STMIPID02SLASHTR datasheet(34/50 Pages) STMICROELECTRONICS

34 / 50 page

Generic script

Below is a generic script which users can start with.

WriteByte(0x0002, 0x15) means that the I2C driver writes 0x15 in register address 0x002.

// MAIN CAMERA CLOCK LANE 1 (CLKP1, CLKN1)

WriteByte(0x0002, 0x15);

// Enable Clock Lane 1 (CLKP1, CLKN1) and UI programmation: 0x15 between 400MHz and 334Mhz, ,

0x19 between 333 and 286MHz, 0x1D between 285 and 250MHz,0x21 between 249 and 223MHz, 0x25

between 222 and 200Mhz and so on

WriteByte(0x0004, 0x02);

// 0x1c CCP mode , 0x02 CSI mode on main camera

MAIN CAMERA DATA LANE 1.1 (DATA1P1, DATA1N1)

WriteByte(0x0005, 0x03);

// 0x03 Enable Data Lane 1.1 (DATA1P1, DATA1N1), 0x00 disable Data lane 1.1

WriteByte(0x0006, 0x01);

// 0x01 for CSI mode set on Data Lane 1.1 (DATA1P1, DATA1N1), 0x0e for CCP mode on Data Lane 1.1

(DATA1P1, DATA1N1)

MAIN CAMERA DATA LANE 1.2 (DATA2P1, DATA2N1)

WriteByte(0x0009, 0x00);

// 0x00 disable Data Lane 1.2 (DATA2P1, DATA2N1). CSI dual lane or second lane, Enable Data Lane

1.2: 0x01

WriteByte(0x000a, 0x01);

// CSI dual lane or second lane, set CSI mode 0x01, CCP second lane, set CCP 0x0e

// SECOND CAMERA CLOCK LANE 2 (CLKP2, CLKN2)

WriteByte(0x0031, 0x14);

// Disable second camera: 0x00. Second camera: Enable Clock Lane 2 (CLKP1, CLKN1) and UI

programmation: 0x17 between 400MHz and 334Mhz, , 0x1B between 333 and 286MHz, 0x1F between

285 and 250MHz,0x23 between 249 and 223MHz, 0x27 between 222 and 200Mhz and so on

WriteByte(0x0033, 0x1c);

// Second camera CCP/CSI(CLKP2, CLKN2, DATAP2, DATAN2) : CCP 0x1c or CSI 0x02

// SECOND CAMERA DATA LANE 2 (DATA1P2, DATA1N2)

WriteByte(0x0034, 0x00);

// 0x00 Disable Data Lane2 , Enable Data lane 2: 0x01 (for CCP or CSI)

WriteByte(0x0035, 0x0e);

// CCP 0x0e, CSI 0x01 on second camera

// CCP MODE (unused in CSI mode)

WriteByte(0x000d, 0x00);

// For CCP main camera,CCP Data clock mode 0x00, CCP data strobe mode 0x01

WriteByte(0x000e, 0x28);

// For CCP mode, Pixel width: 0x30 for 12bits, 0x28 for 10bits,0x20 for 8bits, 0x1C for 7bits,0x18 for 6bits

WriteByte(0x0038, 0x00);

// For CCP 2nd camera, CCP Data clock mode 0x00, CCP data strobe mode 0x01

// MODE CONTROL

WriteByte(0x0014, 0x40);

// No decompression: 0x41

For CCP, 0x40 for CSi single lane, 0x42 for CSi dual lane. Decompression

mode please refer to datasheet/register map.

WriteByte(0x0015, 0x00);

// Normal (non Tristated output), continious clock, clock polarity and synchronization signals not inverted

WriteByte(0x0036, 0x20);

// Enable compensation macro, 0.90Rev of DPHY. 0x20 for main camera, 0x21 for second camera

// Enable compensation macro, 0.81Rev of DPHY. 0x24 for main camera, 0x29 for second camera

WriteByte(0x0017, 0x00);

// Data type: 0x1E YUV422 8-bit, 0x1F YUV422 10-bit, 0x22 RGB565, 0x2A RAW8, 0x2B RAW10,

0x2C RAW12, for other mode please refer to CSI specifications

WriteByte(0x0018, 0x00);

// Data type of embedded data: 0x1E YUV422 8-bit, 0x1F YUV422 10-bit, 0x22 RGB565, 0x2A RAW8,

0x2B RAW10, 0x2C RAW12, for other mode please refer to CSI specifications

WriteByte(0x0019, 0x00);

// 0X00 Data type and pixel width extracted from data stream, 0x04 Data type programmed, pixel width

extracted from data type, 0x0c Data type and pixel width programmed

// MANDATORY FOR CCP MODE AND DECOMPRESSION MODE (unused for uncompressed image

format in CSI mode)

WriteByte(0x001b, 0x00); // LSB of the active lines number

WriteByte(0x001a, 0x00);

// MSB of the active lines number

WriteByte(0x001d, 0x00); // LSB of the embedded lines number (aka status lines number)

WriteByte(0x001c, 0x00);

// MSB of the embedded lines number (aka status lines number)

// PIXEL WIDTH and decompression ON/OFF

WriteByte(0x001e, 0x00);

Image data not compressed: 0x06 for Raw6, 0x07 for Raw7, 0x08 for 8 bits, 0x0A for 10bits, 0x0c for

Raw12. Image data compressed:0x1a for 12-10, 0x18 for 12-8 and 10-8, 0x17 for 12-7 and 10-7, 0x16 for

12-6 and 10-6

WriteByte(0x001f, 0x00);

// Embedded data not compressed: 0x06 for Raw6, 0x07 for Raw7, 0x08 for 8 bits, 0x0A for 10bits, 0x0c

for Raw12. Embedded data compressed:0x1a for 12-10, 0x18 for 12-8 and 10-8, 0x17 for 12-7 and 10-7,

0x16 for 12-6 and 10-6

STMIPID02

Generic script

DS12803 - Rev 1

page 34/50

STMIPID02/TR Datasheet(PDF) 34 Page - STMicroelectronics

STMIPID02/TR Datasheet(HTML) 34 Page - STMicroelectronics

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