LTC2412IGN datasheet(31/36 Pages) LINER

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LTC2412

2412f

APPLICATIO S I FOR ATIO

input driving amplifier. This bandwidth includes the band

limiting effects of the ADC internal calibration and filtering.

The noise of the driving amplifier referred to the converter

input and including all these effects can be calculated as

N = ni • √freqi. The total system noise (referred to the

LTC2412 input) can now be obtained by summing as

square root of sum of squares the three ADC input referred

noise sources: the LTC2412 internal noise (800nV), the

noise of the IN+ driving amplifier and the noise of the IN–

driving amplifier.

If the FO pin is driven by an external oscillator of frequency

fEOSC, Figure 32 can still be used for noise calculation if the

x-axis is scaled by fEOSC/153600. For large values of the

ratio fEOSC/153600, the Figure 32 plot accuracy begins to

decrease, but in the same time the LTC2412 noise floor

rises and the noise contribution of the driving amplifiers

lose significance.

Normal Mode Rejection and Antialiasing

One of the advantages delta-sigma ADCs offer over con-

ventional ADCs is on-chip digital filtering. Combined with

a large oversampling ratio, the LTC2412 significantly

simplifies antialiasing filter requirements.

The Sinc4 digital filter provides greater than 120dB normal

mode rejection at all frequencies except DC and integer

multiples of the modulator sampling frequency (fS). The

LTC2412’s autocalibration circuits further simplify the

antialiasing requirements by additional normal mode sig-

nal filtering both in the analog and digital domain. Inde-

pendent of the operating mode, fS = 256 • fN = 2048 •

fOUTMAX where fN in the notch frequency and fOUTMAX is

the maximum output data rate. In the internal oscillator

mode with a 50Hz notch setting, fS = 12800Hz and with a

60Hz notch setting fS = 15360Hz. In the external oscillator

mode, fS = fEOSC/10.

The combined normal mode rejection performance is

shown in Figure 33 for the internal oscillator with 50Hz

notch setting (FO = HIGH) and in Figure 34 for the internal

oscillator with 60Hz notch setting (FO = LOW) and for the

external oscillator mode. The regions of low rejection

occurring at integer multiples of fS have a very narrow

bandwidth. Magnified details of the normal mode rejection

curves are shown in Figure 35 (rejection near DC) and

Figure 33. Input Normal Mode Rejection,

Internal Oscillator and 50Hz Notch

Figure 34. Input Normal Mode Rejection, Internal

Oscillator and 60Hz Notch or External Oscillator

Figure 32. Input Referred Noise Equivalent Bandwidth

of an Input Connected White Noise Source

INPUT NOISE SOURCE SINGLE POLE

EQUIVALENT BANDWIDTH (Hz)

0.1

100

10k

100k

2412 F32

0.1

100

FO = HIGH

FO = LOW

DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)

0fS 2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS10fS11fS12fS

2412 F33

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

FO = HIGH

FO = LOW OR

FO = EXTERNAL

OSCILLATOR,

fEOSC = 10 • fS

DIFFERENTIAL INPUT SIGNAL FREQUENCY (Hz)

0fS

2412 F34

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–110

–120

2fS 3fS 4fS 5fS 6fS 7fS 8fS 9fS 10fS

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