ST72325AR7-Auto datasheet(205/243 Pages) STMICROELECTRONICS

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ST72325xxx-Auto

Electrical characteristics

Doc ID 13770 Rev 3

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Static and dynamic latch-up

●

LU: Three complementary static tests are required on 10 parts to assess the latch-up

performance. A supply overvoltage (applied to each power supply pin) and a current

injection (applied to each input, output and configurable I/O pin) are performed on each

sample. This test conforms to the EIA/JESD 78 IC latch-up standard. For more details,

refer to the application note AN1181.

●

DLU: Electrostatic discharges (one positive then one negative test) are applied to each

pin of three samples when the micro is running to assess the latch-up performance in

dynamic mode. Power supplies are set to the typical values, the oscillator is connected

as near as possible to the pins of the micro and the component is put in reset mode.

This test conforms to the IEC1000-4-2 and SAEJ1752/3 standards. For more details,

refer to the application note AN1181.

Table 126.

ESD absolute maximum ratings

Symbol

Ratings

Conditions

Max. value(1)

Data based on characterization results, not tested in production.

Unit

VESD(HBM)

Electrostatic discharge voltage

(Human Body Model)

TA  +25°C

2000

VESD(MM)

Electrostatic discharge voltage

(Machine Model)

200

Table 127.

Electrical sensitivities

Symbol

Parameter

Conditions

Class(1)

Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the

JEDEC specifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B

Class strictly covers all the JEDEC criteria (international standard).

Static latch-up class

TA  +25°C

TA  +85°C

TA  +125°C

DLU

Dynamic latch-up class

VDD = 5.5V, fOSC = 4 MHz, TA = +25°C

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