AS1124

Akros Silicon, inc.

6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA

408.746.9000



www.AkrosSilicon.com

4

 

PIN ASSIGNMENTS AND DESCRIPTIONS

Figure 1 – Pin-out Diagram

Table 1 – Pin Assignments

Pin

I/O

Name

Description

1

P

VAUX

Auxiliary supply input

2

P

CT1

High voltage supply transformer center tap input. Polarity insensitive.

3

P

CT2

High voltage supply transformer center tap input. Polarity insensitive.

4

P

SP1

High voltage supply from spare pair. Polarity insensitive.

5

P

SP2

High voltage supply from spare pair. Polarity insensitive.

6

O

VDD48I

Internal 48V bus pin. This pin is the positive bus after the input diode bridge. The bus

is brought out to a pin for the connection of an external ESD capacitor (82nF) and

signature resistor (26.7k Ω).

7

I

GND

Must be connected to paddle ground (not connected internally to the paddle).

8

O

VDD5

Internal 5 volts decoupling point

9

A

RCURR

Current limit pin. Connection to the paddle ground sets the current limit to 400 mA.

Open circuit sets the current limit to 800 mA

10

A

RCLASS

Classification resistor connection

11

A

LVMODE

Low Voltage Mode. When pulled high, LVMODE opens the internal FET switch and

activates the DC-DC controller. Voltage threshold = 2.3 V

12

A

FB

DC-DC Controller feedback point

13

A

COMP

DC-DC Controller error amplifier compensation network connection

14

A

CSS

DC-DC Controller soft-start capacitor

15

A

CS

DC-DC Controller peak current sense input (low side)

16

O

NDRV

DC-DC Controller N-MOSFET gate drive

17

O

VBN

DC-DC Controller low side supply decoupling

18

O

VBP

DC-DC Controller high side supply decoupling

19

O

PDRV

DC-DC Controller P-MOSFET gate drive

20

P

VDD48O

Switched 48V supply output

Paddle

P

GND

Local ground. This is the negative output from the diode bridge, and is not isolated

from the line input

Key:

I = Input

O = Output

I/O = Bidirectional

PD = Internal pull-down

A = Analog signal

P = Power