AS1124 datasheet(3/21 Pages) ETC2

3 / 21 page

AS1124

Akros Silicon, inc.

6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA

408.746.9000



www.AkrosSilicon.com

FIGURES

Figure 1 – Pin-out Diagram ..........................................................................................................................................................4

Figure 2 - DC Current Limit vs. Junction Temperature .................................................................................................................7

Figure 3 - Switch RON vs. Junction Temperature (Min/Max VIN) ...................................................................................................7

Figure 4 - Full Load Diode Bridge VF vs. Junction........................................................................................................................7

Figure 5 - Feedback Error Amplifier VREF vs. Junction Temperature............................................................................................7

Figure 6 - VDD5 vs. Junction Temperature ..................................................................................................................................8

Figure 7 - VDD5 vs. Vin................................................................................................................................................................8

Figure 8 - VBN & VBP (wrt VDD48O) vs. Junction Temperature .................................................................................................8

Figure 9 - VBN & VBP (VBP wrt VDD48O) vs. Vin.......................................................................................................................8

Figure 10 - DCDC Load Regulation vs. IOUT @VIN=48V, VO = 12V ..............................................................................................9

Figure 11 - DCDC Efficiency vs. IOUT @VIN=48V, VO = 12V .........................................................................................................9

Figure 12 - DCDC Line Regulation @IOUT=0.25A.........................................................................................................................9

Figure 13 - DCDC Efficiency vs. POUT @VIN=48V ........................................................................................................................9

Figure 14 – IEEE® Std. 802.3af-2003 Power.............................................................................................................................11

Figure 15 – AS1124 LVMODE Connection ................................................................................................................................13

Figure 16 – Power-On Startup Waveform ..................................................................................................................................14

Figure 17 – AS1124 PCB Footprint............................................................................................................................................16

Figure 18 - 10/100M with Flyback DC-DC converter ..................................................................................................................17

Figure 19 - 10/100M with Forward DC-DC converter .................................................................................................................17

Figure 20 - 10/100M with Buck DC-DC converter ......................................................................................................................18

TABLES

Table 1 – Pin Assignments...........................................................................................................................................................4

Table 2– Absolute Maximum Ratings...........................................................................................................................................5

Table 3– Normal Operating Conditions ........................................................................................................................................5

Table 4– Electrical Characteristics ...............................................................................................................................................5

Table 5 – Package Thermal Characteristic ..................................................................................................................................6

Table 6– PoE Requirements ......................................................................................................................................................10

Table 7 – PoE Requirements .....................................................................................................................................................13

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