SPC560D40L1 datasheet(45/90 Pages) STMICROELECTRONICS

45 / 90 page

SPC560D30x, SPC56040Dx

Electrical characteristics

Doc ID 16315 Rev 7

45/90

capacitor. It is further split into four main domains to ensure noise isolation between

critical LV modules within the device:

–

LV_COR: Low voltage supply for the core. It is also used to provide supply for

FMPLL through double bonding.

–

LV_CFLA: Low voltage supply for code flash module. It is supplied with dedicated

ballast and shorted to LV_COR through double bonding.

–

LV_DFLA: Low voltage supply for data flash module. It is supplied with dedicated

ballast and shorted to LV_COR through double bonding.

–

LV_PLL: Low voltage supply for FMPLL. It is shorted to LV_COR through double

bonding.

Figure 7.

Voltage regulator capacitance connection

The internal voltage regulator requires external capacitance (CREGn) to be connected to the

device in order to provide a stable low voltage digital supply to the device. Capacitances

should be placed on the board as near as possible to the associated pins. Care should also

be taken to limit the serial inductance of the board to less than 5 nH.

Each decoupling capacitor must be placed between each of the three VDD_LV/VSS_LV supply

pairs to ensure stable voltage (see Section 4.5, Recommended operating conditions).

DEVICE

VSS_LV

VDD_BV

VDD_LV

VSS_LV

VDD_LV

VDD

VSS_LV

VDD_LV

CREG2 (LV_COR/LV_CFLA)

CREG3

CDEC2

DEVICE

VDD_BV

VDD_LVn

VREF

VDD

Voltage Regulator

VSS

VSS_LVn

(supply/IO decoupling)

(LV_COR/LV_PLL)

SPC560D40L1 Datasheet(PDF) 45 Page - STMicroelectronics

SPC560D40L1 Datasheet(HTML) 45 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90

Datasheet Descarga

Enlace URL