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AD9920A

Rev. B | Page 29 of 112

Increasing H-Clock Width During HBLK

The AD9920A allows the H1 to H8 pulse width to be increased

during the HBLK interval. As shown in Figure 36, the H-clock fre-

quency can be reduced by a factor of 1/2, 1/4, 1/6, 1/8, 1/10, 1/12,

and so on, up to 1/30. To enable this feature, the HCLK_WIDTH

When this register is set to 0, the wide HCLK feature is disabled.

The reduced frequency occurs for only the H1 to H8 pulses that

are located within the HBLK area.

The HCLK_WIDTH register is generally used in conjunction

with special HBLK patterns to generate vertical and horizontal

mixing in the CCD.

HBLK Mode 1 Operation

HBLK Mode 1 allows more advanced HBLK pattern operation.

If multiple areas of HCLK pulses that are unevenly spaced from

one another are needed, HBLK Mode 1 can be used. Using a

separate set of registers, HBLK Mode 1 can divide the HBLK

region into up to six repeat areas (see Table 12).

As shown in Figure 37, each repeat area shares a common

group of toggle positions: HBLKSTARTA, HBLKSTARTB, and

HBLKSTARTC. However, the number of toggles following a start

position can be unique in each repeat area by using the RAxH1REP

and RAxH2REP registers; these registers, depending on the mode

of operation, are stored in the HBLKTOGO1 to HBLKTOGO6

and HBLKTOGE1 to HBLKTOGE6 registers (Address 0x19 to

Address 0x1E; see Table 63).

Table 13. HCLK Width Register

Length (Bits)

Description

HCLK_WIDTH

Controls the H1 to H8 pulse widths during HBLK as a fraction of pixel rate

0 = same frequency as pixel rate; 1 = 1/2 pixel frequency (doubles the HCLK pulse width);

2 = 1/4 pixel frequency; 3 = 1/6 pixel frequency; 4 = 1/8 pixel frequency;

5 = 1/10 pixel frequency; 15 = 1/30 pixel frequency

HBLK

H-CLOCK FREQUENCY CAN BE REDUCED DURING HBLK BY 1/2 (AS SHOWN),

1/4, 1/6, 1/8, 1/10, 1/12, AND SO ON, UP TO 1/30 USING HBLK_WIDTH REGISTER.

H1/H3

H2/H4

1/fPIX

2 × (1/fPIX)

Figure 36. Generating Wide H-Clock Pulses During HBLK Interval

HBLKSTART

HBLKEND

REPEAT AREA 0

REPEAT AREA 1

REPEAT AREA 2

REPEAT AREA 3

REPEAT AREA 4

REPEAT AREA 5

MASK A, B, C PULSES IN ANY REPEAT

AREA BY SETTING RAxHxREPx = 0

CHANGE NUMBER OF A, B, C PULSES IN ANY

REPEAT AREA USING RAxHxREPx REGISTERS

CREATE UP TO THREE GROUPS OF TOGGLES

(A, B, C) COMMON IN ALL REPEAT AREAS

Figure 37. HBLK Mode 1 Registers

AD9920ABBCZ Datasheet(PDF) 29 Page - Analog Devices

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