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AD9920ABBCZ Datasheet(PDF) 65 Page - Analog Devices

No. de pieza AD9920ABBCZ
Descripción Electrónicos  12-Bit CCD Signal Processor with V-Driver and Precision Timing Generator
PDF  112 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
Logo AD - Analog Devices

AD9920ABBCZ Datasheet(HTML) 65 Page - Analog Devices

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AD9920A
Rev. B | Page 65 of 112
Register
Length (Bits)
Range
Description
LUT_FOR_GP78
4
Logic setting
Desired logic to be realized on GPO7 combined with GPO8.
Example logic settings for LUT_FOR_GPxy:
0x06 = GPy XOR GPx (see Figure 89).
0x07 = GPy NAND GPx.
0x08 = GPy AND GPx.
0x0E = GPy OR GPx.
GPx_TOGx_FD
13
0 to 8191 fields
Field of activity, relative to primary and secondary counter for corresponding toggle.
GPx_TOGx_LN
13
0 to 8191 lines
Line of activity for corresponding toggle.
GPx_TOGx_PX
13
0 to 8191 pixels
Pixel of activity for corresponding toggle.
GPO_INT_EN
1
On/off
When set to 1, internal signals are viewable on GPO1 to GPO3. Also, set the
SEL_GPx bit low to output internal signals.
GPO1 = internal clock.
GPO2 = CLPOB.
GPO3 = delayed sample clock.



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