MRF49XA-ISLASHT datasheet(14/102 Pages) MICROCHIP

14 / 102 page

MRF49XA

DS70590C-page 14

Preliminary

2.5

RFXTL/EXTREF and CLKOUT Pins

The MRF49XA has an internal, integrated crystal

oscillator circuit, and therefore, a single RFXTL/EXTREF

pin is used as a crystal oscillator. The crystal oscillator

circuit, with internal loading capacitors, provides a

10 MHz reference signal for the PLL. The PLL, in turn,

generates the local oscillator frequency. It is possible to

“pull” the crystal to the accurate frequency by changing

the load capacitor value. This reduces the external

component count and simplifies the design. The crystal

load capacitor is programmable from 8.5 pF–16 pF in 0.5

pF steps. Thus, the crystal oscillator circuit can accept a

wide range of crystals from different manufacturers with

different load capacitance requirements. The ability to

vary the load capacitance also helps in fine tuning the

final carrier frequency as the crystal itself is the PLL

reference for the carrier. An external reference input,

such as an oscillator, can be connected as a reference

source. The oscillator can be connected through a 0.01

μF capacitor. Choosing better crystal results in a lesser

TX to RX frequency offset and smaller deviation in

BBBW. Hence, the recommended crystal accuracy

should be ≤40 ppm. Deviation and BBBW are discussed

in detail in Section 2.8, Baseband/Data Filters. The

guidelines for selecting the appropriate crystal are

explained in Section 3.6, Crystal Selection Guidelines.

The transceiver can provide a clock signal through the

Clock Output (CLKOUT) pin to the microcontroller for

accurate timing, and thus, eliminating the need for a

second crystal. This also results in reducing the

component count.

2.6

Phase-Locked Loop

The PLL circuitry determines the operating frequency

of the device. This programmable PLL synthesizer

requires only a single 10 MHz crystal reference source.

The PLL maintains accuracy using the on-chip crystal

controlled reference oscillator and provides maximum

flexibility in performance to the designers. It is possible

to change the crystal to the accurate frequency by

changing the load capacitor value. The RF stability can

be controlled by selecting a crystal with specifications

which satisfy the application and by providing the

functions required to generate the carriers, and by

tuning each of the bands. For more details, see

Section 3.6, Crystal Selection Guidelines. The PLL’s

high resolution allows the use of multiple channels in

any of the bands. The on-chip PLL is able to perform

manual and automatic calibration to compensate for

the changes in temperature or operating voltage.

2.7

Automatic Frequency Control

The PLL in MRF49XA is capable of performing

automatic fine adjustment for the carrier frequency by

using an integrated AFC feature. The receiver uses the

AFC feature to minimize the frequency offset between

the TX/RX signals in discrete steps, which gives the

advantage of:

• Narrower receiver bandwidth for increased

sensitivity can be achieved

• Higher data rates can be achieved

• Usability of any locally available, low-accuracy

and inexpensive crystals can be used

The MRF49XA can be programmed to automatically

control the frequency or can be manually activated by

a strobe signal.

2.8

Baseband/Data Filters

The BBFs are user-programmable. The receiver

bandwidth can be set by programming the bandwidth of

the BBFs. The receiver, when programmed, is set up

according to the characteristics of the signal to be

received. The baseband receiver has several

programming options to optimize the communication

for a variety of applications. The programmable

functions are as follows:

• Baseband Analog Filter

• Baseband Digital Filter

• Receive Bandwidth

• Receive Data Rate

• Clock Recovery

The output data filtering can be performed using either

an external capacitor or a digital filter based on the user

application.

The

RCLKOUT/FCAP/FINT

MRF49XA provides the raw baseband data if

configured as a configuration filter. It can be used by

the host microcontroller to perform the data recovery.

2.9

Clock Recovery Circuit

The Clock Recovery Circuit (CLKRC) is used to render

a synchronized clock source to recover the data using

an external microcontroller. The CLKRC works by

sampling the preamble on the received data. The

preamble contains a sequence of 1 and 0 for the

CLKRC to properly extract the data timing. In Slow

mode, the CLKRC requires more sampling (12–16

bits), and hence, has a longer settling time before

locking. In Fast mode, it uses less samples (6–8 bits)

before locking, and thereby, the settling time is short

which makes timing accuracy less critical. The

RCLKOUT/FCAP/FINT

provides

the

clock

recovered from the incoming data if the baseband filter

is configured as a digital filter.

MRF49XA-I/T Datasheet(PDF) 14 Page - Microchip Technology

MRF49XA-I/T Datasheet(HTML) 14 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Descarga

Enlace URL