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MRF49XA-I/T Datasheet(PDF) 34 Page - Microchip Technology |
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MRF49XA-I/T Datasheet(HTML) 34 Page - Microchip Technology |
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34 / 102 page ![]() MRF49XA DS70590C-page 34 Preliminary © 2009-2011 Microchip Technology Inc. REGISTER 2-11: SYNBREG: SYNCHRONOUS BYTE CONFIGURATION REGISTER (POR: 0xCED4) W-1 W-1 W-0 W-0 W-1 W-1 W-1 W-0 CCB<15:8> bit 15 bit 8 W-1 W-1 W-0 W-1 W-0 W-1 W-0 W-0 SYNCB<7:0> bit 7 bit 0 Legend: r = reserved bit R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-8 CCB<15:8>: Command Code bits The command code bits (11001110b) are serially sent to the microcontroller to identify the bits to be written in the SYNBREG. bit 7-0 SYNCB<7:0>: Synch Byte Configuration bits The SYNBREG assigns the value to SCL0 of the synchronous character in the FIFORSTREG. The value is valid for a byte or word long synchronous character. |
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