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320 Datasheet(PDF) 51 Page - Intel Corporation

No. de pieza 320
Descripción Electrónicos  Celeron D Processor
PDF  82 Pages
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Fabricante Electrónico  INTEL [Intel Corporation]
Página de inicio  http://www.intel.com
Logo INTEL - Intel Corporation

320 Datasheet(HTML) 51 Page - Intel Corporation

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Pin Listing and Signal Descriptions
Datasheet
51
P23
DSTBP#2
Source Synch
Input/Output
P24
D41#
Source Synch
Input/Output
P25
VSS
Power/Other
P26
DBI2#
Source Synch
Input/Output
R1
VSS
Power/Other
R2
A18#
Source Synch
Input/Output
R3
A21#
Source Synch
Input/Output
R4
VSS
Power/Other
R5
ADSTB1#
Source Synch
Input/Output
R6
A28#
Source Synch
Input/Output
R21
D40#
Source Synch
Input/Output
R22
DSTBN#2
Source Synch
Input/Output
R23
VSS
Power/Other
R24
D43#
Source Synch
Input/Output
R25
D42#
Source Synch
Input/Output
R26
VSS
Power/Other
T1
A17#
Source Synch
Input/Output
T2
A22#
Source Synch
Input/Output
T3
VSS
Power/Other
T4
A26#
Source Synch
Input/Output
T5
A30#
Source Synch
Input/Output
T6
VSS
Power/Other
T21
VSS
Power/Other
T22
D46#
Source Synch
Input/Output
T23
D47#
Source Synch
Input/Output
T24
VSS
Power/Other
T25
D45#
Source Synch
Input/Output
T26
D44#
Source Synch
Input/Output
U1
A23#
Source Synch
Input/Output
U2
VSS
Power/Other
U3
A25#
Source Synch
Input/Output
U4
A31#
Source Synch
Input/Output
U5
VSS
Power/Other
U6
TESTHI8
Power/Other
Input
U21
D52#
Source Synch
Input/Output
U22
VSS
Power/Other
U23
D50#
Source Synch
Input/Output
U24
D49#
Source Synch
Input/Output
U25
VSS
Power/Other
U26
D48#
Source Synch
Input/Output
V1
VSS
Power/Other
Table 4-2. Numerical Pin Assignment
Pin #
Pin Name
Signal Buffer
Type
Direction
V2
A27#
Source Synch
Input/Output
V3
A32#
Source Synch
Input/Output
V4
VSS
Power/Other
V5
AP1#
Common Clock
Input/Output
V6
MCERR#
Common Clock
Input/Output
V21
DBI3#
Source Synch
Input/Output
V22
D53#
Source Synch
Input/Output
V23
VSS
Power/Other
V24
D54#
Source Synch
Input/Output
V25
D51#
Source Synch
Input/Output
V26
VSS
Power/Other
W1
A29#
Source Synch
Input/Output
W2
A33#
Source Synch
Input/Output
W3
VSS
Power/Other
W4
TESTHI9
Power/Other
Input
W5
INIT#
Asynch GTL+
Input
W6
VSS
Power/Other
W21
VSS
Power/Other
W22
DSTBN3#
Source Synch
Input/Output
W23
DSTBP3#
Source Synch
Input/Output
W24
VSS
Power/Other
W25
D57#
Source Synch
Input/Output
W26
D55#
Source Synch
Input/Output
Y1
A34#
Source Synch
Input/Output
Y2
VSS
Power/Other
Y3
TESTHI10
Power/Other
Input
Y4
STPCLK#
Asynch GTL+
Input
Y5
VSS
Power/Other
Y6
BPM3#
Common Clock
Input/Output
Y21
D60#
Source Synch
Input/Output
Y22
VSS
Power/Other
Y23
D58#
Source Synch
Input/Output
Y24
D59#
Source Synch
Input/Output
Y25
VSS
Power/Other
Y26
D56#
Source Synch
Input/Output
AA1
VSS
Power/Other
AA2
TESTHI1
Power/Other
Input
AA3
BINIT#
Common Clock
Input/Output
AA4
VSS
Power/Other
AA5
BPM4#
Common Clock
Input/Output
AA6
GTLREF
Power/Other
Input
Table 4-2. Numerical Pin Assignment
Pin #
Pin Name
Signal Buffer
Type
Direction



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