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MPC5634MF0MMGA6 Datasheet(PDF) 99 Page - Freescale Semiconductor, Inc |
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MPC5634MF0MMGA6 Datasheet(HTML) 99 Page - Freescale Semiconductor, Inc |
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99 / 118 page  Electrical characteristics MPC5634M Microcontroller Data Sheet, Rev. 4 Preliminary—Subject to Change Without Notice Freescale Semiconductor 99 3.16.4 eMIOS timing 3.16.5 DSPI timing Table 36. eMIOS timing1 1 eMIOS timing specified at f SYS = 80 MHz, VDD = 1.14 V to 1.32 V, VDDEH = 4.5 V to 5.25 V, TA = TL to TH, and CL = 50 pF with SRC = 0b00. # Symbol C Characteristic Min. Value Max. Value Unit 1 tMIPW CC D eMIOS Input Pulse Width 4 — tCYC 2 tMOPW CC D eMIOS Output Pulse Width 1 — tCYC Table 37. DSPI timing1,2 # Symbol C Characteristic 40 MHz 60 MHz 80 MHz Unit Min. Max. Min. Max. Min. Max. 1tSCK CC D SCK Cycle Time3,4 48.8 ns 5.8 ms 28.4 ns 3.5 ms 24.4 ns 2.9 ms — 2tCSC CC D PCS to SCK Delay5 46 — 26 — 22 — ns 3tASC CC D After SCK Delay6 45 — 25 — 21 — ns 4tSDC CC D SCK Duty Cycle ( ½tSC) – 2 ( ½tSC) + 2 ( ½tSC) – 2 ( ½tSC) + 2 ( ½tSC) – 2 ( ½tSC) + 2 ns 5tA CC D Slave Access Time (SS active to SOUT driven) —25—25 —25 ns 6tDIS CC D Slave SOUT Disable Time (SS inactive to SOUT High-Z or invalid) —25—25 —25 ns 7tPCSC CC D PCSx to PCSS time 4—4—4— ns 8tPASC CC D PCSS to PCSx time 5 — 5 — 5 — ns 9tSUI CC Data Setup Time for Inputs D Master (MTFE = 0) 20 — 20 — 20 — ns D Slave 2 —2—2— D Master (MTFE = 1, CPHA = 0)7 –4 —6—8— D Master (MTFE = 1, CPHA = 1) 20 — 20 — 20 — |
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