HIP2103, HIP2104

2. Pin Information

FN8276 Rev.2.0

Page 7 of 30

Feb 25, 2021

2.

Pin Information

2.1

Pin

Assignments

2.2

Pin Descriptions

HIP2103

(8 Ld 3x3 TDFN)

Top View

HIP2104

(12 Ld 4x4 DFN)

Top View

(8 Ld SOIC)

Top View

HIP2103

HIP2104

Symbol

Description

8 Ld

TDFN

8 Ld

SOIC

12 Ld

DFN

-

-

1

VDen

HIP2104 only. Enable input for the VDD linear regulator, 3.3V or 5V logic compatible, VBAT tolerant.

VDD output is turned on after 1ms debouncing period.

-

-

2

VCen

HIP2104 only. Enable input for the VCC linear regulator, 3.3V or 5V logic compatible, VBAT tolerant.

VCC output is turned on after 1ms debouncing period.

-

-

3

VCC

HIP2104 only. 3.3V/75mA output voltage of linear regulator. Enabled by VCen.

1

1

4

VDD

HIP2103: Driver supply voltage, 4.5V to 14V.

HIP2104: 12V/75mA output voltage of linear regulator and driver supply voltage. Enabled by VDen.

2

2

5

HI

High side input, 3.3V or 5V logic compatible. Internal 100kΩ pull-down resistor on the HI pin pulls HI to

logic 0 when floating.

3

3

6

LI

Low side input, 3.3V or 5V logic compatible. Internal 100kΩ pull-down resistor on the LI pin pulls LI to

logic 0 when floating.

4

4

7

VSS

Signal ground.

5

5

8

LO

Low-side driver output. Connect to the lower NFET gate.

6

6

9

HS

High-side NFET source connection. Connect the bootstrap capacitor from HB to this pin.

7

7

10

HO

High-side driver output. Connect to the upper NFET gate.

8

8

11

HB

High-side Boot capacitor. Connect bootstrap capacitor from HS to this pin.

-

-

12

VBAT

(HIP2104 only) positive battery (bridge voltage) connection.

EP

-

EP

EPAD

Exposed pad. Connect EPAD to VSS. Renesas recommends connecting the EPAD to a low thermal

impedance on the PCB for optimum thermal performance.

EPAD

(VSS)

1

2

3

4

8

7

6

5

VDD

HI

LI

VSS

HB

HO

HS

LO

EPAD

(VSS)

1

2

3

4

12

11

10

9

8

VDen

VCen

VCC

VDD

HI

VBAT

HB

HO

HS

LO

6

5

LI

7

VSS

VDD

HI

VSS

LI

HB

HO

HS

LO

1

2

3

4

8

7

6

5