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DSPIC33FJ12MC02ESS Datasheet(PDF) 14 Page - Microchip Technology

No. de pieza DSPIC33FJ12MC02ESS
Descripción Electrónicos  High-Performance, 16-Bit Digital Signal Controllers
PDF  284 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33FJ12MC02ESS Datasheet(HTML) 14 Page - Microchip Technology

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dsPIC33FJ12MC201/202
DS70265B-page 12
Preliminary
© 2007 Microchip Technology Inc.
2.3
Special MCU Features
The dsPIC33FJ12MC201/202 features a 17-bit by 17-
bit single-cycle multiplier that is shared by both the
MCU ALU and DSP engine. The multiplier can perform
signed, unsigned and mixed-sign multiplication. Using
a 17-bit by 17-bit multiplier for 16-bit by 16-bit
multiplication not only allows you to perform mixed-sign
multiplication, it also achieves accurate results for
special operations, such as (-1.0) x (-1.0).
The dsPIC33FJ12MC201/202 supports 16/16 and 32/
16 divide operations, both fractional and integer. All
divide instructions are iterative operations. They must
be executed within a REPEAT loop, resulting in a total
execution time of 19 instruction cycles. The divide
operation can be interrupted during any of those
19 cycles without loss of data.
A 40-bit barrel shifter is used to perform up to a 16-bit
left or right shift in a single cycle. The barrel shifter can
be used by both MCU and DSP instructions.
FIGURE 2-1:
dsPIC33FJ12MC201/202 CPU CORE BLOCK DIAGRAM
Instruction
Decode &
Control
PCH
PCL
Program Counter
16-bit ALU
24
23
Instruction Reg
PCU
16 x 16
W Register Array
ROM Latch
EA MUX
Interrupt
Controller
Stack
Control
Logic
Loop
Control
Logic
Data Latch
Address
Latch
Control Signals
to Various Blocks
Address Bus
16
16
16
To Peripheral Modules
Data Latch
Address
Latch
16
X RAM
Y RAM
Address Generator Units
16
Y Data Bus
X Data Bus
DSP Engine
Divide Support
16
16
23
23
16
8
PSV & Table
Data Access
Control Block
16
16
16
16
Program Memory
Data Latch
Address Latch



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