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DSPIC33FJ12MC02ESS Datasheet(PDF) 52 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS Datasheet(HTML) 52 Page - Microchip Technology |
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52 / 284 page ![]() dsPIC33FJ12MC201/202 DS70265B-page 50 Preliminary © 2007 Microchip Technology Inc. 4.2 RTSP Operation The dsPIC33FJ12MC201/202 Flash program memory array is organized into rows of 64 instructions or 192 bytes. RTSP allows the user application to erase a page of memory, which consists of eight rows (512 instructions) at a time, and to program one row or one word at a time. Table 23-12 shows typical erase and programming times. The 8-row erase pages and single row write rows are edge-aligned from the beginning of program memory, on boundaries of 1536 bytes and 192 bytes, respectively. The program memory implements holding buffers that can contain 64 instructions of programming data. Prior to the actual programming operation, the write data must be loaded into the buffers sequentially. The instruction words loaded must always be from a group of 64 boundary. The basic sequence for RTSP programming is to set up a Table Pointer, then do a series of TBLWT instructions to load the buffers. Programming is performed by setting the control bits in the NVMCON register. A total of 64 TBLWTL and TBLWTH instructions are required to load the instructions. All of the table write operations are single-word writes (two instruction cycles) because only the buffers are written. A programming cycle is required for programming each row. 4.3 Control Registers Two SFRs are used to read and write the program Flash memory: NVMCON and NVMKEY. The NVMCON register (Register 4-1) controls which blocks are to be erased, which memory type is to be programmed and the start of the programming cycle. NVMKEY is a write-only register that is used for write protection. To start a programming or erase sequence, the user application must consecutively write 0x55 and 0xAA to the NVMKEY register. Refer to Section 4.4 “Programming Operations” for further details. 4.4 Programming Operations A complete programming sequence is necessary for programming or erasing the internal Flash in RTSP mode. A programming operation is nominally 4 ms in duration and the processor stalls (waits) until the operation is finished. Setting the WR bit (NVMCON<15>) starts the operation, and the WR bit is automatically cleared when the operation is finished. |
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