DSPIC33FJ12MC02ESS datasheet(97/284 Pages) MICROCHIP

97 / 284 page

Preliminary

DS70265B-page 95

dsPIC33FJ12MC201/202

For example, suppose a 10 MHz crystal is being used

with the selected oscillator mode of XT with PLL.

• If PLLPRE<4:0> = 0, then N1 = 2. This yields a

VCO input of 10/2 = 5 MHz, which is within the

acceptable range of 0.8-8 MHz.

• If PLLDIV<8:0> = 0x1E, then

M = 32. This yields a VCO output of 5 x 32 = 160

MHz, which is within the 100-200 MHz ranged

needed.

• If PLLPOST<1:0> = 0, then N2 = 2. This provides

a Fosc of 160/2 = 80 MHz. The resultant device

operating speed is 80/2 = 40 MIPS.

EQUATION 7-3:

XT WITH PLL MODE

EXAMPLE

FIGURE 7-2:

dsPIC33FJ12MC201/202 PLL BLOCK DIAGRAM

TABLE 7-1:

CONFIGURATION BIT VALUES FOR CLOCK SELECTION

FCY =

FOSC

2 (

10000000 * 32

2 * 2

) 40 MIPS

Oscillator Mode

Oscillator Source

POSCMD<1:0>

FNOSC<2:0>

Note

Fast RC Oscillator with Divide-by-N

(FRCDIVN)

Internal

111

1, 2

Fast RC Oscillator with Divide-by-16

(FRCDIV16)

Internal

110

Low-Power RC Oscillator (LPRC)

Internal

101

Secondary (Timer1) Oscillator (SOSC)

Secondary

100

Primary Oscillator (HS) with PLL

(HSPLL)

Primary

011

Primary Oscillator (XT) with PLL

(XTPLL)

Primary

011

Primary Oscillator (EC) with PLL

(ECPLL)

Primary

011

Primary Oscillator (HS)

Primary

010

Primary Oscillator (XT)

Primary

010

Primary Oscillator (EC)

Primary

010

Fast RC Oscillator with PLL (FRCPLL)

Internal

001

Fast RC Oscillator (FRC)

Internal

000

Note 1:

OSC2 pin function is determined by the OSCIOFNC Configuration bit.

This is the default oscillator mode for an unprogrammed (erased) device.

0.8-8.0 MHz

Here

100-200 MHz

Here

Divide by

2, 4, 8

Divide by

2-513

Divide by

2-33

Source (Crystal, External Clock

PLLPRE

VCO

PLLDIV

PLLPOST

or Internal RC)

12.5-80 MHz

Here

FOSC

DSPIC33FJ12MC02ESS Datasheet(PDF) 97 Page - Microchip Technology

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