DSPIC33FJ12MC02ESS datasheet(59/284 Pages) MICROCHIP

No. de pieza	DSPIC33FJ12MC02ESS

Descripción Electrónicos	High-Performance, 16-Bit Digital Signal Controllers

PDF	284 Pages

Scroll/Zoom	100%

Fabricante Electrónico	MICROCHIP [Microchip Technology]

Página de inicio	http://www.microchip.com

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59 / 284 page

Preliminary

DS70265B-page 57

dsPIC33FJ12MC201/202

TABLE 5-1:

RESET FLAG BIT OPERATION

bit 1

BOR: Brown-out Reset Flag bit

1 = A Brown-out Reset has occurred

0 = A Brown-out Reset has not occurred

bit 0

POR: Power-on Reset Flag bit

1 = A Power-up Reset has occurred

0 = A Power-up Reset has not occurred

RCON: RESET CONTROL REGISTER(1) (CONTINUED)

Note 1:

All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not

cause a device Reset.

If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the

SWDTEN bit setting.

Flag Bit

Setting Event

Clearing Event

TRAPR (RCON<15>)

Trap conflict event

POR, BOR

IOPUWR (RCON<14>)

Illegal opcode or uninitialized

W register access

POR, BOR

CM (RCON<9>)

Configuration mismatch

POR, BOR

EXTR (RCON<7>)

MCLR Reset

POR

SWR (RCON<6>)

RESET instruction

POR, BOR

WDTO (RCON<4>)

WDT time-out

PWRSAV instruction, POR, BOR,

CLRWDT instruction

SLEEP (RCON<3>)

PWRSAV #SLEEP instruction

POR, BOR

IDLE (RCON<2>)

PWRSAV #IDLE instruction

POR, BOR

BOR (RCON<1>

BOR

—

POR (RCON<0>)

POR

—

Note: All Reset flag bits can be set or cleared by the user software.

DSPIC33FJ12MC02ESS Datasheet(PDF) 59 Page - Microchip Technology

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