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DSPIC33FJ12MC02ESS Datasheet(PDF) 48 Page - Microchip Technology |
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DSPIC33FJ12MC02ESS Datasheet(HTML) 48 Page - Microchip Technology |
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48 / 284 page ![]() dsPIC33FJ12MC201/202 DS70265B-page 46 Preliminary © 2007 Microchip Technology Inc. FIGURE 3-7: DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION 0 Program Counter 23 bits 1 PSVPAG 8 bits EA 15 bits Program Counter(1) Select TBLPAG 8 bits EA 16 bits Byte Select 0 0 1/0 User/Configuration Table Operations(2) Program Space Visibility(1) Space Select 24 bits 23 bits (Remapping) 1/0 0 Note 1: The Least Significant bit (LSb) of program space addresses is always fixed as ‘0’ to maintain word alignment of data in the program and data spaces. 2: Table operations are not required to be word aligned. Table read operations are permitted in the configuration memory space. |
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