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TEA19161CT Datasheet(PDF) 8 Page - NXP Semiconductors |
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TEA19161CT Datasheet(HTML) 8 Page - NXP Semiconductors |
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8 / 44 page ![]() NXP Semiconductors TEA19161CT Digital controller for high-efficiency resonant power supply TEA19161CT All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 2 — 26 February 2020 8 / 44 Careful selection of the appropriate diode minimizes the voltage drop between the SUPREG and SUPHS pins, especially when large MOSFETs and high switching frequencies are used. A large voltage drop across the diode reduces the gate drive of the high-side MOSFET. 8.2 System start-up Figure 5 shows the flow diagram corresponding with Figure 4. aaa-017754 NO SUPPLY VSUPIC < Vuvp(SUPIC) or VSUPREG < Vuvp(SUPREG) all settings defined VSNSBOOST > Vstart(SNSBOOST) PFC disabled via SNSBOOST READOUT SETTINGS PFC START-UP LLC START-UP OPERATING SUPIC regulated via SUPHV VSUPIC > Vstart(SUPIC) and VSUPREG > Vuvp(SUPREG) ISNSFB > Ireg(SNSFB) Figure 5. LLC controller flow diagram When the SUPIC or SUPREG pins drop to below their stop levels, the TEA19161CT enters the no supply state. It recharges the SUPIC and SUPREG pins to their start levels via the SUPHV pin. When the start levels are reached, measuring the external resistances on the SNSSET, SNSOUT, and GATELS pins initialize the settings. During the no supply and readout settings states, the SNSBOOST pin is pulled low, disabling the TEA19162CT PFC. When the settings have been defined, the SNSBOOST pin is released and the PFC starts up. When the SNSBOOST reaches the minimum level Vstart(SNSBOOST), the LLC starts switching. When a small optocurrent is detected (ISNSFB < Ireg(SNSFB)), the output voltage is close to its regulation level. As the SUPIC pin must then be supplied via the primary auxiliary winding, charging via the SUPHV is disabled. |
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