| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
TNETV2501INPGF Datasheet(PDF) 85 Page - Texas Instruments |
|
|
|
|||||||||||||||||||||||||||||
TNETV2501INPGF Datasheet(HTML) 85 Page - Texas Instruments |
|
85 / 197 page ![]() Functional Overview 85 December 2002 − Revised November 2008 SPRS206K 3.10.7.1 IDLE Configuration Register (ICR) 15 10 9 8 Reserved CLKEI† IPORTI R, 000000 R/W, 0 R/W, 0 76 54 32 10 MPORTI XPORTI EMIFI CLKI PERI ICACHEI MPI CPUI R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 R/W, 0 LEGEND: R = Read, W = Write, n = value at reset † This bit must be set to ‘1’ when placing the clock generator in idle; otherwise, a bus error interrupt will be generated. Figure 3−26. IDLE Configuration Register Layout (0x0001) Table 3−27. IDLE Configuration Register Bit Field Description BIT NAME BIT NO. ACCESS RESET VALUE DESCRIPTION Reserved 15−10 R 000000 Reserved CLKEI 9 R/W 0 Extended device clock generator idle control bit. The CLKEI bit must be set to 1 along with the CLKI bit in order to properly place the device clock generator in idle. CLKI CLKEI 0 0 Device clock generator module remains active after execution of an IDLE instruction. 1 1 Device clock generator is disabled after execution of an IDLE instruction. Any other combination of CLKI and CLKEI is not valid. Setting CLKI to 1 and executing the IDLE instruction will generate a bus error interrupt if CLKEI is not set to 1. Disabling the clock generator provides the lowest level of power reduction by stopping the system clock. Whenever the clock generator is idled, the CLKEI, CPUI, MPI, ICACHEI, EMIFI, XPORTI, MPORTI, and IPORTI bits must be set to 1 in order to ensure a proper power-down mode. A bus error interrupt will be generated if the idle instruction is executed when CLKI = 1 and any of these bits are not set to 1. IPORTI 8 R/W 0 IPORT idle control bit. The IPORT is used for all ICACHE transactions. IPORTI = 0: IPORT remains active after execution of an IDLE instruction IPORTI = 1: IPORT is disabled after execution of an IDLE instruction MPORTI 7 R/W 0 MPORT idle control bit. The MPORT is used for all DMA and HPI transactions. MPORTI = 0: MPORT remains active after execution of an IDLE instruction MPORTI = 1: MPORT is disabled after execution of an IDLE instruction XPORTI 6 R/W 0 XPORT idle control bit. The XPORT is used for all I/O memory transactions. XPORTI = 0: XPORT remains active after execution of an IDLE instruction XPORTI = 1: XPORT is disabled after execution of an IDLE instruction EMIFI 5 R/W 0 External Memory Interface (EMIF) idle control bit EMIFI = 0: EMIF module remains active after execution of an IDLE instruction EMIFI = 1: EMIF module is disabled after execution of an IDLE instruction |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |