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TNETV2501INPGF Datasheet(PDF) 44 Page - Texas Instruments |
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TNETV2501INPGF Datasheet(HTML) 44 Page - Texas Instruments |
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44 / 197 page ![]() Functional Overview 44 December 2002 − Revised November 2008 SPRS206K Table 3−4 lists the individual routing of the EMIF and PGPIO signals to the external parallel address, data, and control buses. Table 3−4. TMS320VC5501 Routing of Parallel Port Mux Signals PIN PARALLEL/HOST PORT MUX MODE = 0 (PGPIO) PARALLEL/HOST PORT MUX MODE = 1 (FULL EMIF) Address Bus A[17:2] Reserved EMIF.A[17:2] A[21:18] PGPIO[3:0] EMIF.A[21:18] Data Bus D[31:16] PGPIO[19:4] EMIF.D[31:16] D[15:0] Reserved EMIF.D[15:0] Control Bus C0 PGPIO20 EMIF.ARE/SADS/SDCAS/SRE C1 PGPIO21 EMIF.AOE/SOE/SDRAS C2 PGPIO22 EMIF.AWE/SWE/SDWE C3 PGPIO23 EMIF.ARDY C4 PGPIO24 EMIF.CE0 C5 PGPIO25 EMIF.CE1 C6 PGPIO26 EMIF.CE2 C7 PGPIO27 EMIF.CE3 C8 PGPIO28 EMIF.BE0 C9 PGPIO29 EMIF.BE1 C10 PGPIO30 EMIF.BE2 C11 PGPIO31 EMIF.BE3 C12 PGPIO32 EMIF.SDCKE C13 PGPIO33 EMIF.SOE3 C14 PGPIO34 EMIF.HOLD C15 PGPIO35 EMIF.HOLDA |
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