LTC2420CS8 datasheet(15/36 Pages) LINER

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LTC2420

APPLICATIO S I FOR ATIO

Serial Data Output (SDO)

The serial data output pin, SDO (Pin 6), drives the serial

data during the data output state. In addition, the SDO pin

is used as an end of conversion indicator during the

conversion and sleep states.

When CS (Pin 5) is HIGH, the SDO driver is switched to a

high impedance state. This allows sharing the serial

interface with other devices. If CS is LOW during the

convert or sleep state, SDO will output EOC. If CS is LOW

during the conversion phase, the EOC bit appears HIGH on

the SDO pin. Once the conversion is complete, EOC goes

LOW. The device remains in the sleep state until the first

rising edge of SCK occurs while CS is LOW.

Chip Select Input (CS)

The active LOW chip select, CS (Pin 5), is used to test the

conversion status and to enable the data output transfer as

described in the previous sections.

In addition, the CS signal can be used to trigger a new

conversion cycle before the entire serial data transfer has

been completed. The LTC2420 will abort any serial data

transfer in progress and start a new conversion cycle any-

time a LOW-to-HIGH transition is detected at the CS pin

after the converter has entered the data output state (i.e.,

after the first rising edge of SCK occurs while CS is LOW).

Finally, CS can be used to control the free-running modes

of operation, see Serial Interface Timing Modes section.

Grounding CS will force the ADC to continuously convert

at the maximum output rate selected by FO. Tying a

capacitor to CS will reduce the output rate and power

dissipation by a factor proportional to the capacitor’s

value, see Figures 13 to 15.

SERIAL INTERFACE TIMING MODES

The LTC2420’s 3-wire interface is SPI and MICROWIRE

compatible. This interface offers several flexible modes of

operation. These include internal/external serial clock,

2- or 3-wire I/O, single cycle conversion and autostart. The

following sections describe each of these serial interface

timing modes in detail. In all these cases, the converter

can use the internal oscillator (FO = LOW or FO = HIGH) or

an external oscillator connected to the FO pin. Refer to

Table 4 for a summary.

External Serial Clock, Single Cycle Operation

(SPI/MICROWIRE Compatible)

This timing mode uses an external serial clock to shift out

the conversion result and a CS signal to monitor and

control the state of the conversion cycle, see Figure 6.

The serial clock mode is selected on the falling edge of CS.

To select the external serial clock mode, the serial clock pin

(SCK) must be LOW during each CS falling edge.

The serial data output pin (SDO) is Hi-Z as long as CS is

HIGH. At any time during the conversion cycle, CS may be

pulled LOW in order to monitor the state of the converter.

While CS is pulled LOW, EOC is output to the SDO pin. EOC

= 1 while a conversion is in progress and EOC = 0 if the

device is in the sleep state. Independent of CS, the device

automatically enters the low power sleep state once the

conversion is complete.

When the device is in the sleep state (EOC = 0), its

conversion result is held in an internal static shift regis-

ter. The device remains in the sleep state until the first

rising edge of SCK is seen while CS is LOW. Data is shifted

out the SDO pin on each falling edge of SCK. This enables

Table 4. LTC2420 Interface Timing Modes

Conversion

Data

Connection

SCK

Cycle

Output

and

Configuration

Source

Control

Waveforms

External SCK, Single Cycle Conversion

External

CS and SCK

Figures 6, 7

External SCK, 2-Wire I/O

External

SCK

Figure 8

Internal SCK, Single Cycle Conversion

Internal

↓

Figures 9, 10

Internal SCK, 2-Wire I/O, Continuous Conversion

Internal

Continuous

Internal

Figure 11

Internal SCK, Autostart Conversion

Internal

CEXT

Internal

Figure 12

LTC2420CS8 Datasheet(PDF) 15 Page - Linear Technology

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