HD404618TF datasheet(66/91 Pages) RENESAS

66 / 91 page

HD404618 Series

Table 31 Tone Generator Control Register

TGC

Bit 1

DTMF Enable Bit

DTMF disabled

DTMF enabled

TGC

Bit 2

TONER Output Control (row)

Stopped

TONER output (active)

TGC

Bit 3

TONEC Output Control (column)

Stopped

TONEC output (active)

Tone Generator Speed Flag (TGSP: $020,Bit 2): One-bit register which can be set and reset by the

SEM/REM and SEMD/REMD instructions. The DTMF generation circuit generates output frequencies

with a 400-kHz clock (table 30). With an 800-kHz clock, the DTMF generation circuit generates these

same frequencies by pulling the TGSP flag high.

DTMF Output: The sine waves of the row-group and column-group are individually converted from

digital to analog in the D/A conversion circuit, which provides high-precision ladder resistance. The

DTMF output pins, TONER and TONEC, transmit the sine waves of the row-group and column-group,

respectively. Figure 41 shows thetone output equivalent circuit. Figure 42 shows the output waveform.

One cycle of this wave consists of 32 time slots, making the output waveform stable with little distortion.

Table 32 lists the frequency deviation of the MCU from standard DTMF signals.

VTref

GND

Switch control

TONER

TONEC

Figure 41 Tone Output Equivalent Circuit

HD404618TF Datasheet(PDF) 66 Page - Renesas Technology Corp