HD404618TF datasheet(54/91 Pages) RENESAS

54 / 91 page

HD404618 Series

A write signal input to the serial mode register discontinues the input of the transmit clock to the serial data

reset to 000 to stop transmission, and at the same time, the serial interrupt request flag is set.

Write operations are valid from the second instruction execution cycle, so the STS instruction must be

executed after at least two cycles have been executed. The serial mode register is initialized to $0 by MCU

reset.

Table 25 Serial Mode Register

SMR

Bit 3

0/ SCK Pin

0R0

0 port input/output pin

SCK input/output pin

SMR

Transmit Clock

Bit 2

Bit 1

Bit 0

0/ SCK Pin

Clock Source

Prescaler

Division Ratio

System Clock

Division Ratio

SCK output

Prescaler

÷ 2048

÷ 4096

SCK output

Prescaler

÷ 512

÷ 1024

SCK output

Prescaler

÷ 128

÷ 256

SCK output

Prescaler

÷ 32

÷ 64

SCK output

Prescaler

÷ 8

÷ 16

SCK output

Prescaler

÷ 2

÷ 4

SCK output

System clock

—

÷ 1

SCK input

External clock

—

PMRA3 PMRA2 PMRA1

PMRA: $004

SMR3

SMR2

SMR1

SMR0

SMR: $005

R0 /SO pin mode selection

Transmit clock selection

R0 /

SCK pin mode selection

R0 /SI pin mode selection

PMRA0

Figure 31 Configurations and Functions of the Mode Registers

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