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AS3412 Datasheet(PDF) 44 Page - ams-OSRAM AG |
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AS3412 Datasheet(HTML) 44 Page - ams-OSRAM AG |
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44 / 85 page  ams Datasheet Page 43 [v1-00] 2016-Apr-06 Document Feedback AS3412 − Detailed Description Figure 56: Production Environment I²C Interface Trimming I²C Trimming: This block diagram shows a general overview of the production environment when storing the register settings to the AS3412 using a standard I²C interface. Timing is important, to avoid latch-up, when using an external buffer and switching on the ANC device. The timing diagram in Figure 57 shows that it is important that there is a certain delay requirement between VBAT and the MODE /CSCL pin. This delay is mandatory in order to guarantee that the device starts up properly. The MODE /CSCL pin powers up the ANC device. The whole sequence to power up the internal charge pump of the AS3412 takes approximately 1ms. Once VNEG is settled the external VNEG buffer (e.g. power supply) can be enabled in order to support the charge pump especially during the trim process. Charge Pump CFLY CVNEG Power Supply 1.8V + -1.8V - GND I2C OTP Memory ANC/CSDA MODE/CSCL GND I2C compatible Hardware E.g. BT chip, MCU, ... I2C Clock I2C Data Digital Interface Supply Voltage max. 3.6V GND V Voltage has to be >3.4V for proper trimming |
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