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MSC8144E Quad Core Digital Signal Processor Data Sheet, Rev. 6

Hardware Design Considerations

Freescale Semiconductor

3.4

Connectivity Guidelines

Note:

Although the package actually uses a ball grid array, the more conventional term pin is used to denote signal

connections in this discussion.

First, select the pin multiplexing mode to allocate the required I/O signals. Then use the guidelines presented in the following

subsections for board design and connections. The following conventions are used in describing the connectivity requirements:

GND indicates using a 10 k

Ω pull-down resistor (recommended) or a direct connection to the ground plane. Direct

connections to the ground plane may yield DC current up to 50mA through the I/O supply that adds to overall power

consumption.

VDD indicates using a 10 kΩ pull-up resistor (recommended) or a direct connection to the appropriate power supply.

Direct connections to the supply may yield DC current up to 50mA through the I/O supply that adds to overall power

consumption.

Mandatory use of a pull-up or pull-down resistor it is clearly indicated as “pull-up/pull-down”.

NC indicates “not connected” and means do not connect anything to the pin.

The phrase “in use” indicates a typical pin connection for the required function.

Note:

Please see recommendations #1 and #2 as mandatory pull-down or pull-up connection for unused pins in case of

subset interface connection.

3.4.1

DDR Memory Related Pins

This section discusses the various scenarios that can be used with DDR1 and DDR2 memory.

Note:

For information about unused differential/non-differential pins in DDR1/DDR2 modes (that is, unused negative lines

of strobes in DDR1), please refer to Table 56.

3.4.1.1

DDR Interface Is Not Used

Table 56. Connectivity of DDR Related Pins When the DDR Interface Is Not Used

Signal Name

Pin Connection

MDQ[0–31]

MDQS[0–3]

MA[0–15]

MCK[0–2]

MCS[0–1]

MDM[0–3]

MBA[0–2]

MCAS

MCKE[0–1]

MODT[0–1]

MDIC[0–1]

MRAS

MWE

MECC[0–7]

ECC_MDM

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