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ST7282T2 Datasheet(PDF) 44 Page - Sitronix Technology Co., Ltd. |
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ST7282T2 Datasheet(HTML) 44 Page - Sitronix Technology Co., Ltd. |
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44 / 77 page ![]() ST7282T2 Version 1.2 Page 44 of 77 2016/03 8.2.9 R8: H_BLANKING Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[1] Bit[0] Default R8 R/W H_BLANKING 2Bh Designation Address Description H_BLANKIN G R8[7:0] H back porch setting (unit: DCLK) H_BLANKING=00h: 0 H_BLANKING=2Bh: 43(default) H_BLANKING=FFh: 255 8.2.10 R9: VDPOL、HDPOL、V_BLANKING Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[1] Bit[0] Default R9 R/W VDPOL HDPOL V_BLANKING CCh Designation Address Description VDPOL R9[7] VSYNC polarity select VDPOL=0: Positive polarity VDPOL=1: Negative polarity (default) * Hardware pin setting (VDPOL) with R9[7] interaction HW PIN SW-R9[7] VDPOL Polarity 0 0 Negative 0 1 Positive 1 0 Positive 1 1 Negative HDPOL R9[6] HSYNC polarity select HDPOL=0: Positive polarity HDPOL=1: Negative polarity (default) * Hardware pin setting (HDPOL) with R9[6] interaction HW PIN SW-R9[6] HDPOL Polarity 0 0 Negative 0 1 Positive 1 0 Positive 1 1 Negative V_BLANKIN G R9[5:0] V back porch setting (unit: H) V_BLANKING=00h: 0 V_BLANKING=0Ch: 12(default) V_BLANKING=3Fh: 63 |
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