ST7282T2 datasheet(35/77 Pages) SITRONIX

35 / 77 page

ST7282T2

Version 1.2

Page 35 of 77

2016/03

6. PIN DESCRIPTION

6.1 Pin Function

Name

Type

Description

(VDDI)

Serial communication chip select, Internal pull high.

SDA

I/O

(VDDI)

Serial communication data input and output, Internal pull low.

SCL

(VDDI)

Serial communication clock input, Internal pull low.

PARA_SERI

(VDDI)

PARA_SERI

=”High”, Parallel 24-bit RGB input through DR0~7, DB0~DB7,

DG0~DG7.

PARA_SERI

=”Low”, Serial 8-bit RGB input through DG0~DG7.

DR0~DR7

(VDDI)

8-bit digital Red data input

DG0~DG7

(VDDI)

8-bit digital Green data input

DB0~DB7

(VDDI)

8-bit digital Blue data input

DCLK

(VDDI)

Clock signal for data latching and internal counter for the timing controller.

HSYNC

(VDDI)

Horizontal sync signal.

When not used, user should

connect it to “Low”.

(Please refer to the chapter 12.1)

VSYNC

(VDDI)

Vertical sync signal.

When not used, user should

connect it to “Low”.

(Please refer to the chapter 12.1)

(VDDI)

Data input enable control.

When not used, user should

connect it to “Low”.

(Please refer to the chapter 12.1)

SYNC

(VDDI)

No Function. User should connect it to

“Low”

HDIR

(VDDI)

Horizontal scan direction control..

HDIR = “High”: Shift from left to right.

HDIR = “Low” : Shift from right to left.

When not used, user should connect it to “High”

(Please refer to the register setting : HDIR)

VDIR

Vertical scan direction control.

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