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ST7282T2 Datasheet(PDF) 41 Page - Sitronix Technology Co., Ltd. |
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ST7282T2 Datasheet(HTML) 41 Page - Sitronix Technology Co., Ltd. |
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41 / 77 page  ST7282T2 Version 1.2 Page 41 of 77 2016/03 8.2 Register description 8.2.1 R0: Direction setting Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[1] Bit[0] Default R0 R/W - VDIR HDIR - - - - - 60h Designation Address Description VDIR R0[6] Vertical shift direction setting VDIR=0: Shift from down to top, last line=L1 ← L2…L543←L544=first line VDIR=1: Shift from top to down, first line=L1 → L2…L543→L544=last line (default) * Hardware pin setting (VDIR) with R0[6] interaction HW PIN SW-R0[6] Vertical shift direction 0 0 Shift from up to down 0 1 Shift from down to up 1 0 Shift from down to up 1 1 Shift from up to down HDIR R0[5] Horizontal shift direction setting HDIR=0: Shift from right to left, last data=Y1 ← Y2…Y719←Y720=first data HDIR=1: Shift from left to right, first data=Y1 → Y2…Y719→Y720=last data (default) * Hardware pin setting (HDIR) with R0[5] interaction HW PIN SW-R0[5] Horizontal shift direction 0 0 Shift from left to right 0 1 Shift from right to left 1 0 Shift from right to left 1 1 Shift from left to right 8.2.2 R1: GRB、DISP Register TYPE Bit[7] Bit[6] Bit[5] Bit[4] Bit[3] Bit[2] Bit[1] Bit[0] Default R1 R/W - - - - GRB - - DISP 08h Designation Address Description GRB R1[3] Register reset setting GRB=0: Reset all registers to default value GRB=1: Normal operation(default) DISP R1[0] Standby(power saving) mode setting DISP=0: Standby, timing control, DAC, and DC/DC converter are off, and register |
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