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LIS2DUX12TR Datasheet(PDF) 15 Page - STMicroelectronics |
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LIS2DUX12TR Datasheet(HTML) 15 Page - STMicroelectronics |
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15 / 102 page ![]() Table 9. Internal pin status Pin # Name Function Pin status 1 SCL SPC I²C/MIPI I3C® serial clock (SCL) SPI serial port clock (SPC) Default: input without pull-up 2 CS SPI/I²C/MIPI I3C® mode selection 1: SPI idle mode / I²C/MIPI I3C® enabled 0: SPI enabled / I²C/MIPI I3C® disabled Default: input with internal pull-up 3 SDO SA0 Serial data output (SDO) I²C less significant bit of the device address (SA0) Default: input without internal pull-up 4 SDA SDI SDO I²C/MIPI I3C® serial data (SDA) SPI serial data input (SDI) 3-wire interface serial data output (SDO) Default: (SDA) input without internal pull-up 5 NC Internally not connected. Can be tied to Vdd, Vdd_IO, or GND. 6 GND 0 V supply 7 RES Connect to GND if not used as interrupt pin 1(1) 8 GND 0 V supply 9 Vdd Power supply 10 Vdd_IO Power supply for I/O pins 11 INT2 Interrupt pin 2. Clock input when selected in one-shot mode. Default: input with internal pull-down(2)(3) 12 INT1 Interrupt pin 1 Default: input with internal pull-down(4)(5) 1. When the INT1_ON_RES bit of register CTRL1 (10h) is set to 1, the interrupt signals configured on the INT1 pin are routed to the RES pin. 2. The internal pull-down can be disconnected by setting the PD_DIS_INT2 bit of register PIN_CTRL (0Ch) to 1. When this is done, the INT2 pin needs to be externally biased. 3. The INT2 pin is configured as "push-pull output forced to GND" (and the internal pull-down disabled) as soon as it is configured with the interrupt configuration bits in the CTRL3 (12h), MD2_CFG (20h), EMB_FUNC_INT2 (0Eh), FSM_INT2 (0Fh), and MLC_INT2 (11h) registers. 4. The internal pull-down can be disconnected by setting the PD_DIS_INT1 bit of register PIN_CTRL (0Ch) to 1. When this is done, the INT1 pin needs to be externally biased. 5. The INT1 pin is configured as "push-pull output forced to GND" (and the internal pull-down disabled) as soon as it is configured with the interrupt configuration bits in the CTRL2 (11h), MD1_CFG (1Fh), EMB_FUNC_INT1 (0Ah), FSM_INT1 (0Bh), and MLC_INT1 (0Dh) registers. LIS2DUX12 Application hints DS14071 - Rev 2 page 15/102 |
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