LIS2DUX12TR datasheet(98/102 Pages) STMICROELECTRONICS

98 / 102 page

Table 109. FIFO_DATA_OUT_Z_H and FIFO_DATA_OUT_Z_L registers .................................... 57

Table 110. FIFO_DATA_OUT_Z_H and FIFO_DATA_OUT_Z_L register description............................. 57

Table 111. FIFO_BATCH_DEC register ........................................................... 57

Table 112. FIFO_BATCH_DEC register description ................................................... 57

Table 113. Accelerometer batch data rate .......................................................... 57

Table 114. TAP_CFG0 register ................................................................. 58

Table 115. TAP_CFG0 register description ......................................................... 58

Table 116. TAP_CFG1 register ................................................................. 58

Table 117. TAP_CFG1 register description ......................................................... 58

Table 118. TAP_CFG2 register ................................................................. 59

Table 119. TAP_CFG2 register description ......................................................... 59

Table 120. TAP_CFG3 register ................................................................. 59

Table 121. TAP_CFG3 register description ......................................................... 59

Table 122. TAP_CFG4 register ................................................................. 59

Table 123. TAP_CFG4 register description ......................................................... 59

Table 124. TAP_CFG5 register ................................................................. 60

Table 125. TAP_CFG5 register description ......................................................... 60

Table 126. TAP_CFG6 register ................................................................. 60

Table 127. TAP_CFG6 register description ......................................................... 60

Table 128. TIMESTAMP output registers .......................................................... 61

Table 129. TIMESTAMP output register description ................................................... 61

Table 130. Register address map - embedded functions ................................................ 62

Table 131. PAGE_SEL register ................................................................. 64

Table 132. PAGE_SEL register description ......................................................... 64

Table 133. EMB_FUNC_EN_A register............................................................ 64

Table 134. EMB_FUNC_EN_A register description ................................................... 64

Table 135. EMB_FUNC_EN_B register............................................................ 65

Table 136. EMB_FUNC_EN_B register description ................................................... 65

Table 137. EMB_FUNC_EXEC_STATUS register .................................................... 65

Table 138. EMB_FUNC_EXEC_STATUS register description ............................................ 65

Table 139. PAGE_ADDRESS register ............................................................ 65

Table 140. PAGE_ADDRESS register description .................................................... 65

Table 141. PAGE_VALUE register ............................................................... 66

Table 142. PAGE_VALUE register description ....................................................... 66

Table 143. EMB_FUNC_INT1 register ............................................................ 66

Table 144. EMB_FUNC_INT1 register description .................................................... 66

Table 145. FSM_INT1 register.................................................................. 67

Table 146. FSM_INT1 register description ......................................................... 67

Table 147. MLC_INT1 register.................................................................. 68

Table 148. MLC_INT1 register description ......................................................... 68

Table 149. EMB_FUNC_INT2 register ............................................................ 68

Table 150. EMB_FUNC_INT2 register description .................................................... 68

Table 151. FSM_INT2 register.................................................................. 69

Table 152. FSM_INT2 register description ......................................................... 69

Table 153. MLC_INT2 register.................................................................. 70

Table 154. MLC_INT2 register description ......................................................... 70

Table 155. EMB_FUNC_STATUS register.......................................................... 70

Table 156. EMB_FUNC_STATUS register description.................................................. 70

Table 157. FSM_STATUS register ............................................................... 71

Table 158. FSM_STATUS register description ....................................................... 71

Table 159. MLC_STATUS register ............................................................... 71

Table 160. MLC_STATUS register description ....................................................... 71

Table 161. PAGE_RW register ................................................................. 72

Table 162. PAGE_RW register description ......................................................... 72

Table 163. EMB_FUNC_FIFO_EN register ......................................................... 72

LIS2DUX12

List of tables

DS14071 - Rev 2

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