WM8581 datasheet(86/94 Pages) WOLFSON

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WM8581

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PP Rev 1.0 March 2006

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

101

24 bits

20 bits

110

21 bits

17 bits

All other combinations are reserved and may give erroneous

operation. Data will be truncated internally when these bits are set

7:4

ORGSAMP

[3:0]

Original Sampling Frequency. See S/PDIF specification for details.

0000 = original sampling frequency not indicated

AUDIO_N

Recovered Channel Status bit-1.

0 = Data word represents audio PCM samples.

1 = Data word does not represent audio PCM samples.

PCM_N

Indicates that non-audio code (defined in IEC-61937) has been

detected.

0 = Sync code not detected.

1 = Sync code detected – received data is not audio PCM.

CPY_N

Recovered Channel Status bit-2.

0 = Copyright is asserted for this data.

1 = Copyright is not asserted for this data.

Note this signal is inverted and will cause an interrupt on logic 0.

DEEMPH

Recovered Channel Status bit-3

0 = Recovered S/PDIF data has no pre-emphasis.

1 = Recovered S/PDIF data has pre-emphasis

5:4

REC_FREQ

[1:0]

Indicates recovered S/PDIF clock frequency:

00 = 192kHz

01 = 96kHz / 88.2kHz

10 = 48kHz / 44.1kHz

11 = 32kHz

R49

SPDSTAT

31h

UNLOCK

Indicates that the S/PDIF Clock Recovery circuit is unlocked or

that the input S/PDIF signal is not present.

0 = Locked onto incoming S/PDIF stream.

1 = Not locked to the incoming S/PDIF stream or the incoming

S/PDIF stream is not present.

PWDN

Chip Powerdown Control (works in tandem with the other

powerdown registers):

0 = All digital circuits running, outputs are active

1 = All digital circuits in power save mode, outputs muted

ADCPD

ADC powerdown:

0 = ADC enabled

1 = ADC disabled

4:2

DACPD[3:0]

1111

DAC powerdowns (0 = DAC enabled, 1 = DAC disabled)

DACPD[0] = DAC1

DACPD[1] = DAC2

DACPD[2] = DAC3

DACPD[3] = DAC4

R50

PWRDN 1

32h

ALLDACPD

Overrides DACPD[3:0]

0 = DACs under control of DACPD[3:0]

1= All DACs are disabled.

OSCPD

OSC power down

0 = OSC enabled

1 = OSC disabled

PLLAPD

0 = PLLA enabled

1 = PLLA disabled

R51

PWRDN 2

33h

PLLBPD

0 = PLLB enable

1 = PLLB disable

WM8581 Datasheet(PDF) 86 Page - Wolfson Microelectronics plc

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