WM8581 datasheet(72/94 Pages) WOLFSON

72 / 94 page

WM8581

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PP Rev 1.0 March 2006

PRIMARY AUDIO INTERFACE (TX) MASTER MODE CONTROL

In Hardware Control Mode, the SDIN pin is used to enable the master mode function on the Primary

Audio Interface transmitter. This has the same operation as the PAIFTX_MS register bit. The

PAIFTX_RATE default settings of 256fs, and 64 BCLKs/LRCLK for BCLKSEL, are used in Hardware

Control Mode. See page Error! Bookmark not defined. for more information on master mode

operation.

SDIN

AUDIO INTERFACE (TX)

Slave

Master

Table 74 Audio Interface (Transmitter) Master Mode Hardware Mode Control

S/PDIF ERROR HANDLING

Should the incoming S/PDIF sub-frame contain a parity error or a bi-phase encoding error, it is

assumed the sub-frame has become corrupted. Similarly, if VALIDITY is detected as 1, it is assumed

the data within the S/PDIF frame is invalid. Under these conditions, the S/PDIF Receiver repeats the

last valid sample in place of the corrupted/invalid samples. (Note: For the S/PDIF receiver to S/PDIF

transmitter path, only VALIDITY errors will cause data to be overwritten – parity and bi-phase errors

have will not cause data to be overwritten).

POWERDOWN CONTROL

In Software Control Mode, the device is powered-down by default. In Hardware Control Mode, the

chip is powered-up by default but can be powered up by setting the ALLPD(MFP7) input high. (Note

that in Software Control Mode, this pin takes the function of SAIF_LRCLK or GPO7).

ALLPD (MFP7)

Powerup

Powerdown

Table 75 Hardware Mode Powerdown Control

WM8581 Datasheet(PDF) 72 Page - Wolfson Microelectronics plc