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WM8581 Datasheet(PDF) 44 Page - Wolfson Microelectronics plc

No. de pieza WM8581
Descripción Electrónicos  Multichannel CODEC with S/PDIF Transceiver
PDF  94 Pages
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Fabricante Electrónico  WOLFSON [Wolfson Microelectronics plc]
Página de inicio  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8581 Datasheet(HTML) 44 Page - Wolfson Microelectronics plc

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PP Rev 1.0 March 2006
44
PRIMARY AUDIO INTERFACE TRANSMITTER (PAIF TX)
The PAIF Transmitter requires a left-right-clock (LRCLK) and a bit-clock (BCLK). These can be
supplied externally (slave mode) or they can be generated internally by the WM8581 (master mode).
The master mode LRCLK/BCLK are created by the Master Mode Clock Gen module. The control of
this module is described on page 34. The clock supplied to this module can be ADCMCLK,
PLLACLK, PLLBCLK, or MCLK and is selected by the internal signal paiftxms_clksel’. If the PAIF
Transmitter is sourcing the S/PDIF Receiver, it is recommended that the interface operate in master
mode. For this path, paiftxms_clksel selects PLLACLK. For all other digital routing options,
paiftxms_clksel selects whichever clock the adc_clk is using.
If in slave mode, and adc_clk is set to be MCLK, then the PAIFRX_BCLK is used as the BCLK for
the PAIF Transmitter.
Figure 29 PAIF Transmitter Clock Selection



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