K32L2AX datasheet(67/96 Pages) NXP

67 / 96 page

Table 38. VREF limited-range operating requirements

Symbol

Description

Min.

Max.

Unit

Notes

Temperature

°C

—

Table 39. VREF limited-range operating behaviors

Symbol

Description

Min.

Max.

Unit

Notes

Vout

Voltage reference output 1.2 V with factory trim

1.173

1.225

—

Vout

Voltage reference output 2.1 V with factory trim

2.088

2.115

—

8.6.3 CMP and 6-bit DAC electrical specifications

Table 40. Comparator and 6-bit DAC electrical specifications

Symbol

Description

Min.

Typ.

Max.

Unit

VDD

Supply voltage

1.71

—

3.6

IDDHS

Supply current, high-speed mode (EN=1, PMODE=1)

—

200

μA

IDDLS

Supply current, low-speed mode (EN=1, PMODE=0)

—

μA

VAIN

Analog input voltage

VSS – 0.3

—

VDD

VAIO

Analog input offset voltage

—

Analog comparator hysteresis1

• CR0[HYSTCTR] = 00

• CR0[HYSTCTR] = 01

• CR0[HYSTCTR] = 10

• CR0[HYSTCTR] = 11

—

VCMPOh

Output high

VDD – 0.5

—

VCMPOl

Output low

—

0.5

tDHS

Propagation delay, high-speed mode (EN=1, PMODE=1)

200

tDLS

Propagation delay, low-speed mode (EN=1, PMODE=0)

250

600

Analog comparator initialization delay2

—

μs

IDAC6b

6-bit DAC current adder (enabled)

—

μA

INL

6-bit DAC integral non-linearity

–0.5

—

0.5

LSB3

DNL

6-bit DAC differential non-linearity

–0.3

—

0.3

LSB

1. Typical hysteresis is measured with input voltage range limited to 0.6 to VDD–0.6 V.

2. Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to

CMP_DACCR[DACEN], CMP_DACCR[VRSEL], CMP_DACCR[VOSEL], CMP_MUXCR[PSEL], and

CMP_MUXCR[MSEL]) and the comparator output settling to a stable level.

3. 1 LSB = Vreference/64

Peripheral operating requirements and behaviors

K32 L2A Microcontroller with 512 KB Flash and 128 KB SRAM, Rev. 3, 02/2021

NXP Semiconductors

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