| Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
5222-DS00-R Datasheet(PDF) 33 Page - Broadcom Corporation. |
|
|
|||||||||||||||||||||||||||||
5222-DS00-R Datasheet(HTML) 33 Page - Broadcom Corporation. |
|
33 / 76 page ![]() Preliminary Data Sheet BCM5222 7/20/04 Broadcom Corporation Document 5222-DS02-405-R MII Status Register Page 21 10BASE-T HALF-DUPLEX CAPABILITY The BCM5222 is capable of 10BASE-T half-duplex operation, and returns a 1 when bit 11 of the Status register is read. RESERVED BITS Ignore the BCM5222 output when these bits are read. PREAMBLE SUPPRESSION This bit is the only writable bit in the Status register. Setting this bit to a 1 allows subsequent MII management frames to be accepted with or without the standard preamble pattern. When preamble suppression is enabled, only 2 preamble bits are required between successive management commands, instead of the normal 32. AUTO-NEGOTIATION COMPLETE Returns a 1 if auto-negotiation process has been completed and the contents of registers 4, 5, and 6 are valid. REMOTE FAULT The PHY returns a 1 on bit 4 of the status register when its link partner has signalled a far-end fault condition. When a far- end fault occurs, the bit is latched at 1 and remains so until the register is read and the remote fault condition has been cleared. AUTO-NEGOTIATION CAPABILITY The BCM5222 is capable of performing IEEE auto-negotiation, and returns a 1 when bit 4 of the Status register is read, regardless of whether the auto-negotiation function has been disabled. LINK STATUS The BCM5222 returns a 1 on bit 2 of the Status register when the link state machine is in link pass, indicating that a valid link has been established. Otherwise, it returns 0. When a link failure occurs after the link pass state has been entered, the link status bit is etched at 0 and remains so until the bit is read. After the bit is read, it becomes 1 when the link pass state is entered again. JABBER DETECT 10BASE-T operation only. The BCM5222 returns a 1 on bit 1 of the Status register if a jabber condition has been detected. After the bit is read once, or if the chip is reset, it reverts to 0. EXTENDED CAPABILITY The BCM5222 supports extended capability registers, and returns a 1 when bit 0 of the Status register is read. Several extended registers have been implemented in the BCM5222, and their bit functions are defined later in this section. |
|
Enlace URL |
| ¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Enlace a la hoja de datos | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |