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TNETV6446AINZWT Datasheet(PDF) 134 Page - Texas Instruments

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No. de pieza TNETV6446AINZWT
Descripción Electrónicos  Digital Media System-on-Chip
PDF  227 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
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TNETV6446AINZWT Datasheet(HTML) 134 Page - Texas Instruments

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TMS320DM6446
SPRS283H – DECEMBER 2005 – REVISED SEPTEMBER 2010
www.ti.com
Table 6-35. Switching Characteristics Over Recommended Operating Conditions for Asynchronous
Memory Cycles for EMIFA Module(1) (2) (see Figure 6-21 and Figure 6-22)
A-513,
-594,
NO.
PARAMETER
UNIT
-810
MIN
MAX
READS and WRITES
1
td(TURNAROUND)
Turn-around time
(TA + 1) * E - 2
(TA + 1) * E + 2
ns
READS
(RS + RST + RH +
(RS + RST + RH + TA +
EMIF read cycle time (EW = 0)
ns
TA + 4) * E - 0.5
4) * E + 0.5
3
tc(EMRCYCLE)
(RS + RST + RH +
EMIF read cycle time (EW = 1)
4184 * E + 0.5
ns
TA + 4) * E - 0.5
Output setup time, EM_CS[5:2] low to EM_OE low
(RS + 1) * E - 1
(RS + 1) * E + 1.4
ns
(SS = 0)
4
tsu(EMCSL-EMOEL)
Output setup time, EM_CS[5:2] low to EM_OE low
-1
ns
(SS = 1)
Output hold time, EM_OE high to EM_CS[5:2] high
(RH + 1) * E - 2.1
(RH + 1) * E + 1.4
ns
(SS = 0)
5
th(EMOEH-EMCSH)
Output hold time, EM_OE high to EM_CS[5:2] high
-2.2
ns
(SS = 1)
6
tsu(EMBAV-EMOEL)
Output setup time, EM_BA[1:0] valid to EM_OE low
(RS + 1) * E - 1.8
(RS + 1) * E + 1.3
ns
7
th(EMOEH-EMBAIV)
Output hold time, EM_OE high to EM_BA[1:0] invalid
(RH + 1) * E - 2.3
(RH + 1) * E + 1.1
ns
8
tsu(EMAV-EMOEL)
Output setup time, EM_A[21:0] valid to EM_OE low
(RS + 1) * E - 1.9
(RS + 1) * E + 1.5
ns
9
th(EMOEH-EMAIV)
Output hold time, EM_OE high to EM_A[21:0] invalid
(RH + 1) * E - 2.6
(RH + 1) * E + 1.2
ns
EM_OE active low width (EW = 0)
(RST + 1) * E - 2
(RST + 1) * E + 2
ns
10
tw(EMOEL)
EM_OE active low width (EW = 1)
(RST + 1) * E - 2
(RST + 4097) * E + 2
ns
11
td(EMWAITH-EMOEH)
Delay time from EM_WAIT deasserted to EM_OE high
4E + 10.4
ns
WRITES
(WS + WST + WH
(WS + WST + WH + TA
EMIF write cycle time (EW = 0)
ns
+ TA + 4) * E - 0.5
+ 4) * E + 0.5
15
tc(EMWCYCLE)
(WS + WST + WH
EMIF write cycle time (EW = 1)
4184 * E + 0.5
ns
+ TA + 4) * E -0.5
Output setup time, EM_CS[5:2] low to EM_WE low
(WS + 1) * E - 0.9
(WS + 1) * E + 1.4
ns
(SS = 0)
16
tsu(EMCSL-EMWEL)
Output setup time, EM_CS[5:2] low to EM_WE low
-1
ns
(SS = 1)
Output hold time, EM_WE high to EM_CS[5:2] high
(WH + 1) * E - 2.1
(WH + 1) * E + 1.1
ns
(SS = 0)
17
th(EMWEH-EMCSH)
Output hold time, EM_WE high to EM_CS[5:2] high
-2.1
ns
(SS = 1)
18
tsu(EMRNW-EMWEL)
Output setup time, EM_R/W valid to EM_WE low
(WS + 1) * E - 0.7
(WS + 1) * E + 0.9
ns
19
th(EMWEH-EMRNW)
Output hold time, EM_WE high to EM_R/W invalid
(WH + 1) * E - 0.9
(WH + 1) * E + 0.9
ns
20
tsu(EMBAV-EMWEL)
Output setup time, EM_BA[1:0] valid to EM_WE low
(WS + 1) * E - 1.7
(WS + 1) * E + 1.5
ns
21
th(EMWEH-EMBAIV)
Output hold time, EM_WE high to EM_BA[1:0] invalid
(WH + 1) * E - 2.3
(WH + 1) * E + 0.9
ns
22
tsu(EMAV-EMWEL)
Output setup time, EM_A[21:0] valid to EM_WE low
(WS + 1) * E - 1.8
(WS + 1) * E + 1.7
ns
23
th(EMWEH-EMAIV)
Output hold time, EM_WE high to EM_A[21:0] invalid
(WH + 1) * E - 2.6
(WH + 1) * E + 1
ns
EM_WE active low width (EW = 0)
(WST + 1) * E - 2
(WST + 1) * E + 2
ns
24
tw(EMWEL)
EM_WE active low width (EW = 1)
(WST + 1) * E - 2
(WST + 4097) * E + 2
ns
(1)
RS = Read setup, RST = Read STrobe, RH = Read Hold, WS = Write Setup, WST = Write STrobe, WH = Write Hold, TA = Turn
Around, EW = Extend Wait mode, SS = Select Strobe mode. These parameters are programmed via the Asynchronous Bank and
Asynchronous Wait Cycle Configuration Registers and support the following range of values: TA[3:0], RS[15:0], RST[63:0], RH[7:0],
WS[15:0], WST[63:0], WH[7:0], and EW[255:0]. For more information, see the TMS320DM644x DMSoC Asynchronous External Memory
Interface (EMIF) Reference Guide (literature number SPRUE20).
(2)
E = SYSCLK5 period in ns for EMIFA. For example, when running the DSP CPU at 594 MHz, use E = 10.1 ns. For example, when
running the DSP CPU at 810 MHz, use E = 7.4 ns.
134
Peripheral and Electrical Specifications
Copyright © 2005–2010, Texas Instruments Incorporated
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