TNETV1644ZDU6 datasheet(138/306 Pages) TI1

138 / 306 page

TMS320DM6437

Digital Media Processor

SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

Table 3-47. EMIFA/VPSS Sub-Block 0 Configuration Choice E(1)

PINMUX SELECTION FIELDS

RESULTING PERIPHERALS/PINS

MAJOR

MINOR

CONFIG

AEA

PCIEN

AEM

OTHERS

PCI

EMIFA

VPFE

# GPIO PINS

OPTION

8-bit EMIFA

Cfg Summary

No PCI

(NAND) Pinout

No CCDC

21 GP pins

mode 5

CCDCSEL = 0

0 = GP[54, 43:36]

HVDSEL = 0

0 = GP[53:52]

CWENSEL = 0

0 = GP[35]

101

000

CFLDSEL = 0

0 = GP[34]

CI10SEL = 0

0 = GP[45:44]

CI32SEL= 0

0 = GP[47:46]

CI54SEL = 0

0 = GP[49:48]

CI76SEL = 0

0 = GP[51:50]

8-bit EMIFA

8-to-16-bit

Cfg Summary

No PCI

(NAND) Pinout

0-to-12 GP pins

CCDC

mode 5

CCDCSEL = 1

1 = PCLK, YI[7:0] -

HVDSEL = 0,1

1= VD, HD

0 = GP[53:52]

CWENSEL = 0,1

1 = C_WE

0 = GP[35]

101

000

CFLDSEL = 0,1

1 = C_FIELD

0 = GP[34]

CI10SEL = 0,1

1 = CI[1:0]

0 = GP[45:44]

CI31SEL = 0,1

1 = CI[3:2]

0 = GP[47:46]

CI54SEL = 0,1

1 = CI[5:4]

0 = GP[49:48]

CI76SEL = 0,1

1 = CI[7:6]

0 = GP[51:50]

(1)

Italics indicate mandatory settings for a given Minor Configuration option.

138

Device Configurations

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