TNETV1644ZDU6 datasheet(136/306 Pages) TI1

136 / 306 page

TMS320DM6437

Digital Media Processor

SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008

www.ti.com

Table 3-45. EMIFA/VPSS Sub-Block 0 Configuration Choice C(1)

MAJOR

MINOR

PINMUX SELECTION FIELDS

RESULTING PERIPHERALS/PINS

CONFIG

PCIEN

AEM

AEAW

OTHERS

PCI

EMIFA

VPFE

# GPIO PINS

OPTION

8-bit EMIFA

Config Summary

No PCI

(Async) Pinout

No CCDC

12 GP pins

mode 3

0 = GP[54,

CCDCSEL = 0

43:36]

HVDSEL = 0

0 = GP[53:52]

011

000

CWENSEL = 0

0 = EM_R/W

CFLDSEL = 0

0 = GP[34]

CI10SEL = 0

0 = EM_D[6:7]

CI32SEL = 0

0 = EM_D[4:5]

CI54SEL = 0

0 = EM_D[2:3]

CI76SEL = 0

0 = EM_D[0:1]

8-bit EMIFA

Config Summary

No PCI

(Async) Pinout

8-bit CCDC

0-to-3 GP pins

mode 3

1 = PCLK,

CCDCSEL = 1

YI[7:0]

HVDSEL = 0,1

1 = VD, HD

0 = GP[53:52]

011

000

CWENSEL = 0

0 = EM_R/W

CFLDSEL = 0

1 = C_FIELD

0 = GP[34]

CI10SEL = 0

0 = EM_D[6:7]

CI31SEL = 0

0 = EM_D[4:5]

CI54SEL = 0

0 = EM_D[2:3]

CI76SEL = 0

0 = EM_D[0:1]

(1)

Italics indicate mandatory settings for a given Minor Configuration option.

136

Device Configurations

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