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TNETV1644ZDU6 Datasheet(PDF) 114 Page - Texas Instruments

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No. de pieza TNETV1644ZDU6
Descripción Electrónicos  Digital Media Processor
PDF  306 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV1644ZDU6 Datasheet(HTML) 114 Page - Texas Instruments

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TMS320DM6437
Digital Media Processor
SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008
www.ti.com
Table 3-21. Multiplexed Pins on DM6437 (continued)
SIGNAL
PINMUX DESCRIPTION
ZWT
ZDU
NAME
PINMUX GROUP
CONTROLLED BY PINMUX BIT FIELDS
NO.
NO.
HECC_TX/TOUT1L/UTXD1/GP[55]
K4
N3
Timer 1 Block
TIM1BK
CLKS1/TINP0L/GP[98]
K2
L2
Timer 0 Block
TIM0BK
CLKS0/TOUT0L/GP[97]
J4
L3
Timer 0 Block
TIM0BK
URXD0/GP[85]
L2
M2
UART0 Data Block
UR0DBK
UTXD0/GP[86]
K3
N1
UART0 Data Block
UR0DBK
UCTS0/GP[87]
L1
P1
UART0 Flow Control Block
UR0FCBK
URTS0/PWM0/GP[88]
L3
M3
UART0 Flow Control Block
UR0FCBK
CLKOUT0/PWM2/GP[84]
M1
R1
CLKOUT Block
CKOBK
Note: PINMUX groups EMIFA/VPSS Sub-Block 2 and PCI Data Block are not shown in the above table
because there is no actual pin multiplexing in those blocks. But these two blocks are still considered "pin
mux blocks" because they contain some of the pins necessary for EMIFA and PCI, respectively. The pins
in these blocks are as follows:
• EMIFA/VPSS Sub-Block 2
–
EM_WAIT/(RDY/BSY)
–
EM_OE
–
EM_WE
• PCI Data Block
–
AD30
–
AD28
–
AD26
Device Configurations
114
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