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TNETV1644ZDU6 Datasheet(PDF) 252 Page - Texas Instruments |
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TNETV1644ZDU6 Datasheet(HTML) 252 Page - Texas Instruments |
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252 / 306 page  TMS320DM6437 Digital Media Processor SPRS345D – NOVEMBER 2006 – REVISED JUNE 2008 www.ti.com Table 6-65. Timing Requirements for McBSP as SPI Master or Slave: CLKSTP = 11b, CLKXP = 0(1)(2) (see Figure 6-37) -7/-6/-5/-4 -L/-Q6/-Q5/-Q4 NO. UNIT MASTER SLAVE MIN MAX MIN MAX 4 tsu(DRV-CKXH) Setup time, DR valid before CLKX high 14 2 - 3P ns 5 th(CKXH-DRV) Hold time, DR valid after CLKX high 4 5 + 6P ns (1) P = SYSCLK3 period in ns. For example, when running parts at 600 MHz, use P = 10 ns. (2) For all SPI Slave modes, the rate of the internal clock CLKG must be at least 8 times faster than that of the SPI data rate. User should program sample rate generator to achieve maximum CLKG by setting CLKSM = CLKGDV = 1. Peripheral Information and Electrical Specifications 252 Submit Documentation Feedback |
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