Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

Preview PDF HTML

TNETV2664FIBZWT Datasheet(PDF) 239 Page - Texas Instruments

Click here to check the latest version.
No. de pieza TNETV2664FIBZWT
Descripción Electrónicos  Fixed-Point Digital Signal Processor
PDF  249 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

TNETV2664FIBZWT Datasheet(HTML) 239 Page - Texas Instruments

Back Button TNETV2664FIBZWT Datasheet HTML 235Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 236Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 237Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 238Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 239Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 240Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 241Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 242Page - Texas Instruments TNETV2664FIBZWT Datasheet HTML 243Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 239 / 249 page
background image
TCK
TDO
TDI/TMS/TRST
1
2
3
4
2
TMS320C6424
www.ti.com
SPRS347D – MARCH 2007 – REVISED DECEMBER 2009
Table 6-92. JTAG ID Register Selection Bit Descriptions
BIT
NAME
DESCRIPTION
31:28
VARIANT
Variant (4-Bit) value. A read from this field always returns 0b0000.
27:12
PART NUMBER
Part Number (16-Bit) value. C6424 value: 1011 0111 0010 0001.
11-1
MANUFACTURER
Manufacturer (11-Bit) value. C6424 value: 0000 0010 111.
0
LSB
LSB. This bit is read as a "1" for C6424.
6.22.2 JTAG Electrical Data/Timing
Table 6-93. Timing Requirements for JTAG Test Port (see Figure 6-49)
-7/-6/-5/-4
-L/-Q6/-Q5/-Q4
NO.
UNIT
MIN
MAX
1
tc(TCK)
Cycle time, TCK
33
ns
3
tsu(TDIV-TCKH)
Setup time, TDI/TMS/TRST valid before TCK high
2.5
ns
4
th(TCKH-TDIV)
Hold time, TDI/TMS/TRST valid after TCK high
16.5
ns
Table 6-94. Switching Characteristics Over Recommended Operating Conditions for JTAG Test Port
(see Figure 6-49)
-7/-6/-5/-4
-L/-Q6/-Q5/-Q4
NO.
PARAMETER
UNIT
MIN
MAX
2
td(TCKL-TDOV)
Delay time, TCK low to TDO valid
0
14
ns
Figure 6-49. JTAG Test-Port Timing
Copyright © 2007–2009, Texas Instruments Incorporated
Peripheral Information and Electrical Specifications
239
Submit Documentation Feedback
Product Folder Link(s): TMS320C6424



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Descarga

Go To PDF Page


Enlace URL



¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Enlace a la hoja de datos    |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com