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TNETV1002IDZHK Datasheet(PDF) 29 Page - Texas Instruments |
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TNETV1002IDZHK Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 102 page ![]() DSP Subsystem Functional Overview 19 June 2001 -- Revised December 2002 SPRS180C Table 3--3. McBSP Control Registers and Subaddresses McBSP0 McBSP1 SUB DESCRIPTION NAME ADDRESS NAME ADDRESS SUB ADDRESS DESCRIPTION SPCR10 39h SPCR11 49h 00h Serial port control register 1 SPCR20 39h SPCR21 49h 01h Serial port control register 2 RCR10 39h RCR11 49h 02h Receive control register 1 RCR20 39h RCR21 49h 03h Receive control register 2 XCR10 39h XCR11 49h 04h Transmit control register 1 XCR20 39h XCR21 49h 05h Transmit control register 2 SRGR10 39h SRGR11 49h 06h Sample rate generator register 1 SRGR20 39h SRGR21 49h 07h Sample rate generator register 2 MCR10 39h MCR11 49h 08h Multichannel register 1 MCR20 39h MCR21 49h 09h Multichannel register 2 RCERA0 39h RCERA1 49h 0Ah Receive channel enable register partition A RCERB0 39h RCERB1 49h 0Bh Receive channel enable register partition B XCERA0 39h XCERA1 49h 0Ch Transmit channel enable register partition A XCERB0 39h XCERB1 49h 0Dh Transmit channel enable register partition B PCR0 39h PCR1 49h 0Eh Pin control register 3.3.1 Bank-Switching Control Register The 5471 bank-switching control register (BSCR) controls both the bank-switching wait-state generation functions that are consistent with the 5409, and several 5471-specific features. These special features include control of configuration of some DSP subsystem external memory interface functionality and some aspects of the interface whereby the MCU may access a portion of the DSP subsystem RAM. The BSCR is shown in Figure 3--5 and the bits are described in Table 3--4. The BSCR register also gives the DSP some control over the ARM programming interface, the mechanism which enables the MCU to access portions of the DSPs internal RAM. Included are the API mode (APIMODE), an interrupt to the MCU (HINT), and DSP memory map selection (ABMDIS). 15 12 11 10 5 4 3 2 1 0 BNKCMP PS--DS Reserved ABM DIS HINT API MODE Reserved EXIO R/W-1111 R/W-1 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 LEGEND: R = Read, W = Write Figure 3--5. Bank-Switching Control Register (BSCR) |
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