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LTC1406IGN Datasheet(PDF) 2 Page - Linear Technology

No. de pieza LTC1406IGN
Descripción Electrónicos  Low Power, 8-Bit, 20Msps, Sampling A/D Converter
PDF  16 Pages
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Fabricante Electrónico  LINER [Linear Technology]
Página de inicio  http://www.linear.com
Logo LINER - Linear Technology

LTC1406IGN Datasheet(HTML) 2 Page - Linear Technology

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LTC1406
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
AVDD = OVDD = DVDD = VDD (Notes 1, 2)
Supply Voltage (VDD) ................................................. 6V
Analog Input Voltage (Note 3) .... – 0.3V to (VDD + 0.3V)
Digital Input Voltage (Note 4) .................. – 0.3V to 10V
Digital Output Voltage ................. – 0.3V to (VDD + 0.3V)
Power Dissipation .............................................. 500mW
Ambient Operation Temperature Range
LTC1406C................................................ 0
°C to 70°C
LTC1406I ............................................ – 40
°C to 85°C
Storage Temperature Range ................. – 65
°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300
°C
ORDER PART
NUMBER
Consult factory for Military grade parts.
LTC1406CGN
LTC1406IGN
1
2
3
4
5
6
7
8
9
10
11
12
TOP VIEW
GN PACKAGE
24-LEAD PLASTIC SSOP
24
23
22
21
20
19
18
17
16
15
14
13
OGND
OVDD
SHDN
VBIAS
VREF
AGND
AIN
+
AIN
AVDD
AGND
DGND
DVDD
CLK
OF/UF
D7
D6
D5
D4
D3
D2
D1
D0
NC
NC
TJMAX = 110°C, θJA = 85°C/ W
CC
HARA TERISTICS
CO VERTER
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Resolution (No Missing Codes)
q
8
Bits
Integral Linearity Error
(Note 7)
q
±0.5
±1
LSB
Differential Linearity Error
q
±0.25
±1
LSB
Offset Error
(Note 8)
q
±1
±8
LSB
Gain Error
With External 2.5V Reference
±1
±5
LSB
(Notes 5, 6)
The q denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
PUT
I
A
A
LOG
(Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VIN
Analog Input Span [(AIN
+) – (AIN–)] (Note 9)
4.75V
≤ VDD ≤ 5.25V
q
±1V
Input (AIN
+ or AIN–) Range
Voltage On Either AIN
+ or AIN–
q
0VDD
V
IIN
Analog Input Leakage Current
CLK = 0
q
±5
µA
CIN
Analog Input Capacitance
CLK = 1
4
pF
CLK = 0
2
pF
Input Bandwidth
250
MHz
tAP
Sample-and-Hold Aperture Delay Time
3
ns
tjitter
Sample-and-Hold Aperture Delay Time Jitter
5
psRMS
CMRR
Analog Input Common Mode Rejection Ratio
– 2.5V < (AIN– = AIN+) < 2.5V
60
dB
VBIAS
Internal Bias Voltage
No Load
2.2
V



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