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AS3607 Datasheet(PDF) 61 Page - ams AG |
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AS3607 Datasheet(HTML) 61 Page - ams AG |
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61 / 71 page ![]() www.austriamicrosystems.com Revision 1.03 60 - 70 AS3606 AS3607 2v2 Data Sheet - R e g i s t e r D e f i n i t i o n Table 51. Fourth Interrupt Register Name Base Default IRQENRD_3 2-wire serial 00h Offset: 26h Fourth Interrupt Register Please be aware that writing to this register will enable/disable the corresponding interrupts, while reading gets the actual interrupt status and will clear the register at the same time. It is not possible to read back the interrupt enable/disable settings. This register is reset at a VDD27-POR or XRES input. Bit Bit Name Default Access Bit Description 7:6 - 00 R/W 5 T_DEB<1:0> 0 R/W Sets the de-bounce time all interrupt inputs: 0: 3ms 1: off 4:3 - 00 R/W 2JTEMP_HIGH (level) 0 W Supervisor junction over-temperature interrupt setting 0: disable 1: enable x R Supervisor junction over-temperature interrupt reading 0: chip temperature below threshold 1: chip temperature has reached the threshold The threshold can be set in the SUPERVISOR register (21h) 1- 0 R/W 0ADC_EOC (edge) 0 W ADC end of conversion interrupt setting 0: disable 1: enable x R ADC end of conversion interrupt reading 0: ADC conversion not finished 1: ADC conversion finished. Read out ADC10_0 and ADC10_1 register to get the result (2Eh & 2Fh) |
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