AS3607 datasheet(39/71 Pages) AMSCO

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Revision 1.03

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AS3606 AS3607 2v2

Data Sheet - R e g i s t e r D e f i n i t i o n

Table 19. CVDD1 Register

Name

Base

Default

CVDD1

2-wire serial

00h

Offset: 17h-1

CVDD1 DC/DC Buck Regulator Control Register

This is an extended register and needs to be enabled by writing 001b to Reg. 1Ch first.

This register is reset at a VDD27-POR or XRES input.

Bit

Bit Name

Default

Access

Bit Description

CVDD1_fast

R/W

Selects a faster regulation mode for CVDD1 suitable for larger load changes.

0: normal mode, Cext=10µF

1: fast mode, Cext=22µF required

6:0

VSEL_CVDD1<6:0>

000000

R/W

The voltage select bits set the DC/DC output voltage level and power the

DC/DC converter down.

00h: DC/DC powered down

01h-40h: CVDD1=0.6V+VSEL_CVDD1*12.5mV

41h-70h: CVDD1=1.4V+(VSEL_CVDD1-40h)*25mV

71h-7Fh: CVDD1=2.6V+(VSEL_CVDD1-70h)*50mV

Table 20. CVDD2 Register

Name

Base

Default

CVDD2

2-wire serial

00h

Offset: 17h-2

CVDD2 DC/DC Buck Regulator Control Register

This is an extended register and needs to be enabled by writing 010b to Reg. 1Ch first.

This register is reset at a VDD27-POR or XRES input.

Bit

Bit Name

Default

Access

Bit Description

CVDD2_fast

R/W

Selects a faster regulation mode for CVDD2 suitable for larger load changes.

0: normal mode, Cext=10µF

1: fast mode, Cext=22µF required

6:0

VSEL_CVDD2<6:0>

000000

R/W

The voltage select bits set the DC/DC output voltage level and power the

DC/DC converter down.

00h: DC/DC powered down

01h-40h: CVDD1=0.6V+VSEL_CVDD1*12.5mV

41h-70h: CVDD1=1.4V+(VSEL_CVDD1-40h)*25mV

71h-7Fh: CVDD1=2.6V+(VSEL_CVDD1-70h)*50mV

AS3607 Datasheet(PDF) 39 Page - ams AG

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