AS3607 datasheet(41/71 Pages) AMSCO

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AS3606 AS3607 2v2

Data Sheet - R e g i s t e r D e f i n i t i o n

Table 23. DCDC_Cntr Register

Name

Base

Default

DCDC_Cntr

2-wire serial

00h

Offset: 17h-5

DC/DC Step Down Control Register

This is an extended register and needs to be enabled by writing 101b to Reg. 1Ch first.

This register is reset at a VDD27-POR or XRES input.

Bit

Bit Name

Default

Access

Bit Description

CFM_CVDD23_OFF

R/W

Disables pulse skip mode for DCDC2 and DCDC3

0: current force mode / pulse skip enabled

1: current force mode / pulse skip disable

CFM_CVDD1_OFF

R/W

Disables pulse skip mode for DCDC1

0: current force mode / pulse skip enabled

1: current force mode / pulse skip disable

CVDD23_FREQ

R/W

Selects the switching frequency for DCDC2 and DCDC 3

0: 2MHz

1: 1MHz

CVDD1_FREQ

R/W

Selects the switching frequency for DCDC1

0: 2MHz

1: 1MHz

3:2

DVM_CVDD23<1:0>

R/W

Configures the dynamic voltage management (output voltage slope) for

CVDD2 and CVDD3

00: immediate change of the output voltage

01: 32µs/step

10: 128µs/step

11: 512µs/step

1:0

DVM_CVDD1<1:0>

R/W

Configures the dynamic voltage management (output voltage slope) for

CVDD1

00: immediate change of the output voltage

01: 32µs/step

10: 128µs/step

11: 512µs/step

AS3607 Datasheet(PDF) 41 Page - ams AG

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