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910GL Datasheet(PDF) 151 Page - Intel Corporation |
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910GL Datasheet(HTML) 151 Page - Intel Corporation |
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151 / 426 page ![]() Host-PCI Express* Bridge Registers (D1:F0) (Intel® 82915G/82915P/82915PL Only) R Datasheet 151 8.1.33 DCAP—Device Capabilities (D1:F0) PCI Device: 1 Address Offset: A4h Default Value: 00000000h Access: RO Size: 32 bits This register indicates PCI Express link capabilities. Bit Access & Default Description 31:6 Reserved 5 RO 0b Extended Tag Field Supported: Hardwired to indicate support for 5-bit Tags as a Requestor. 4:3 RO 00b Phantom Functions Supported: Hardwired to 0. 2:0 RO 000b Max Payload Size: Hardwired to indicate 128B maximum supported payload for Transaction Layer Packets (TLP). |
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