MC68HC705MC4MP datasheet(66/180 Pages) FREESCALE

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Input/Output Ports

MC68HC705MC4 — Rev. 2.0

Input/Output Ports

7.5 Port B

Port B is a 4-bit bidirectional port that can share pins PB4–PB5 with the

SCI subsystem. Port B data register is located at address $0001 and its

data direction register (DDR) is located at address $0005. Reset does

not affect the data registers, but clears the DDRs, thereby setting all of

the port pins to input mode. Writing a 1 to a DDR bit sets the

corresponding port pin to output mode. (See Figure 7-3.)

PB7 features a larger n-channel output device and can, therefore, sink

more current than a standard port. (Refer to Section 14. Electrical

Specifications.)

PB4–PB5 may be used for general I/O applications when the SCI

subsystem is disabled. When the serial communications interface (SCI)

subsystem is enabled, port B registers are still accessible to software.

Writing to either of the port B registers could corrupt the SCI data. See

Section 11. Serial Communications Interface for a discussion of the

SCI subsystem.

PB6–PB7 remain as I/O pins when the SCI subsystem is enabled.

Figure 7-3. Port B I/O Circuitry

READ $0001

WRITE $0001

READ $0005

DATA

I/O

OUTPUT

INTERNAL HC05

DATA BUS

RESET

(RST)

WRITE $0005

DATA DIRECTION

Freescale Semiconductor, Inc.

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MC68HC705MC4MP Datasheet(PDF) 66 Page - Freescale Semiconductor, Inc