MC68HC705MC4MP datasheet(64/180 Pages) FREESCALE

No. de pieza	MC68HC705MC4MP

Descripción Electrónicos	General Release Specification

PDF	180 Pages

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Fabricante Electrónico	FREESCALE [Freescale Semiconductor, Inc]

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Input/Output Ports

MC68HC705MC4 — Rev. 2.0

Input/Output Ports

7.3 Port A

Port A is an 8-bit bidirectional port that shares PA1–PA6 with the pulse

width modulator (PWM) subsystem. (See Figure 7-1.) The port A data

is located at address $0004. Reset does not affect the data registers, but

clears the DDRs, thereby setting all of the port pins to input mode.

Writing a 1 to a DDR bit sets the corresponding port pin to output mode.

PA1–PA6 may be used for general I/O applications when the PWM

subsystem is disabled. PA0–PA7 feature larger P-channel output

devices and are capable of sourcing more current than a standard port

(refer to Section 14. Electrical Specifications).

Figure 7-1. Port A I/O Circuitry

READ $0000

WRITE $0000

READ $0004

DATA

I/O

OUTPUT

INTERNAL HC05

DATA BUS

RESET

(RST)

WRITE $0004

DATA DIRECTION

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MC68HC705MC4MP Datasheet(PDF) 64 Page - Freescale Semiconductor, Inc